Input pin in pull up mode is being in high impedance state
I have set PA3 pin as input with pull up mode. But testing this pin by multimeter I get high impendance state (0.5V) on it. Must be 3.3V (logical 1). I use stm32F417ZGT6.
I have set PA3 pin as input with pull up mode. But testing this pin by multimeter I get high impendance state (0.5V) on it. Must be 3.3V (logical 1). I use stm32F417ZGT6.
Note, that the internal pullup is nominally 40kOhm, so it won't provide enough current to overcome an external 10kOhm pulldown to a valid logic 1 state.
Actually, if VDD is around 3V, a 40kOhm/10kOhm divider you have should result in cca 0.6V, matching your observation.
JW
Enter your E-mail address. We'll send you an e-mail with instructions to reset your password.