Interrupt generation with PWM signal's rising and falling edges

[Avi_8]

Hello, 
I am quite new to this. I am generating a PWM signal(100Hz with 40% duty cycle) using Tim1 on my stm32f103c8t6(Bluepill). I want to take ADC readings(both ADC1 and ADC2 in simultaneous mode) during the high part of the PWM signal at a frequency of 1KHz. I want to understand how many timers would be required for this. Currently I am trying to use Tim2 set at 1KHz and trying to trigger it using the TRGO of Tim1. Then I am using TRGO of Tim2 as external trigger conversion source for the ADCs. However as far as I know for Tim1 PWM signal I can only get an interrupt for either when the signal start(Update Event) or when it goes from high to low(Output Compare). How can I get both interrupts so that I can start and stop Tim2.
Any help would be appreciated.
TIA

[STea]

Hello @Avi_8 ,

if i understand your request correctly you want to capture both update event and output compare interrupts for TMI1 to start and stop TIM2 here are the steps :

1. Configure TIM1 to generate the PWM signal with a 100Hz frequency and 40% duty cycle.

2. Configure TIM2 to generate an interrupt at a frequency of 1kHz. You can use the TIM2 Update Event to generate the interrupt.

3. In the TIM1 Update Event interrupt handler, start TIM2 .

4. In the TIM1 Output Compare interrupt handler, stop TIM2.

5. Configure the ADCs to operate in simultaneous mode and use the TIM2 TRGO as the external trigger conversion source.

6. In the ADC interrupt handler, read the ADC conversion results and process them as required.

BR

[Avi_8]

This did the job for me. Thank you for the prompt reply. 

[TDK]

You can configure the pin as an EXTI input and select both rising and falling edges as the trigger. A pin can be a timer out and an EXTI source at the same time.

[Avi_8]

Okay. I will try this approach as well. Thank you.

[waclawek.jan]

> However as far as I know for Tim1 PWM signal I can only get an interrupt for either when the signal start(Update Event) or when it goes from high to low(Output Compare).

Why would that be so? You can of course have interrupt for Update, and also for CC event (ie. Output Compare). Just set both UIE and CCxIE in TIMx_DIER. The 'F1 has two different vectors for TIM1's Update and CC interrupts, so you have to write two Interrupt Service Routines.

You can also output given channel as TRGO, and use it as TRGI for the Slave-mode controller of TIM2, setting it to Gated mode. In that way, the whole mechanism can work automatically without any software intervention.

JW

PS.

> stm32f103c8t6(Bluepill)

It's quite unlikely you have an STM32 on a BluePill.

[Avi_8]

Being new to stm I guess I got a bit overwhelmed by the .ioc file and the multiple options it provides. Using two ISRs I could make it work. Thank you.