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bhavan_kumar
Visitor II
July 19, 2024
Solved

ISR function timing period issue

  • July 19, 2024
  • 2 replies
  • 937 views

Hi 

       We are working on STM32H503 MCU which has ARM Cortex 33. In datasheet it is provided that 12 cycles or instruction to enter into an interrupt function. Configured system clock as 250MHz, with that we could reach an interrupt function within 48ns. But in practical it's taking around 146ns. we have enabled a GPIO pin as high inside the ISR function which takes 5 (20ns) instructions. So, 146ns-20ns = 126ns taking to enter into an ISR function. Please provide me a solution to achieve the interrupt function within 48ns.

 

Regards

Bhavan

    This topic has been closed for replies.
    Best answer by TDK

    The solution would be to write your code in assembly. Sort of. You'll still have delays.

    With C, you're going to have overhead as the function enters, and values are loaded into registers.

    Also note there is a delay between the GPIO high instruction executing and the pin actually going high. This is due to the nature of the system trying to be as fast as it can--things are buffered and sent out when possible. This is not analogous to a slow 8-bit microcontroller anymore.

    You can also have delays between an edge occurring and the actual ISR getting triggered.

    2 replies

    T
    TDKAnswer
    Super User
    July 19, 2024

    The solution would be to write your code in assembly. Sort of. You'll still have delays.

    With C, you're going to have overhead as the function enters, and values are loaded into registers.

    Also note there is a delay between the GPIO high instruction executing and the pin actually going high. This is due to the nature of the system trying to be as fast as it can--things are buffered and sent out when possible. This is not analogous to a slow 8-bit microcontroller anymore.

    You can also have delays between an edge occurring and the actual ISR getting triggered.

      T
      Tesla DeLorean
      Graduate II
      July 19, 2024

      What does the interrupt/response need to do?

      For tight margins, use HW, perhaps a CPLD, or DMA, TIM, PSSI, DCMI

      Takes this time to enter, and exit, stack would want to be in TCM. Code that causes a FLASH line fetch, probably going to induce a ~35 ns delay. Put vector table, and code in ITCM

      Input pins also have a resynchronizer circuit to allow signals to cross clock domains, figure 3 cycles at GPIO AHB/APB clock.

      Again perhaps state a reason/goal that defines what you're doing and why.

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