IWDG minimum reload in STM32L452
Hello community!
I'm working with the independent watchdog with a STM32L452 MCU in the Nucleo-L452RE board and I'm facing a problem trying to set low values in the reload register. When I try to set the reload register to values lower than 5 cycles (IWDG->RLR < 4), no matter the value of the prescaler register, the watchdog resets the system.
The clock used in the system is the HSI and it is configured to be the source of the sysclk.
My suspicion is, that as it is said for the status register for the VDD voltage domain, some LSI/Prescaler cycles are needed to take into account the refresh. But in the datasheet (DS11912 Rev 7, page 180) is specified that the minimum reload value is for RL = 0x000 and nothing is said in the device errata sheet (ES0388 Rev 8) as a limitation of the peripheral.
Am I doing something wrong or missing something? Thank you in advance.
I left the code that I'm executing to reproduce the error. It configures the HAL and the system clock. Then the IRQs are disabled and the LED of the board and IWDG are configured. If there is a reset from the watchdog, the LED is turned on and the execution ends
int main(void) {
// reset of all peripherals, Initializes the Flash interface and the Systick
HAL_Init();
// configure the system clock
SystemClock_Config();
// disable IRQs
__disable_irq();
/* configure LED */
// enable clock
uint32_t temp;
RCC->AHB2ENR |= RCC_AHB2ENR_GPIOAEN;
(void) RCC->AHB2ENR;
// set GPIO_PIN_5 from GPIOA
GPIOA->OTYPER &= ~(0x1 << 5);
GPIOA->PUPDR &= ~(0x3 << (5 * 2));
temp = GPIOA->MODER;
temp &= ~(0x3 << (5 * 2));
temp |= (GPIO_MODE_OUTPUT_PP << (5 * 2));
GPIOA->MODER = temp;
// check reset cause and set led if iwdg reset
if (RCC->CSR & (1 << RCC_CSR_IWDGRSTF_Pos)) {
// clear reset cause
RCC->CSR |= RCC_CSR_RMVF;
// set LED
GPIOA->BSRR = GPIO_PIN_5;
while (1) {} // infinite wait
}
/* configure IWDG peripheral */
// stop IWDG in debug
#ifdef DEBUG
DBGMCU->APB1FZR1 |= DBGMCU_APB1FZR1_DBG_IWDG_STOP;
#endif
// configure registers
IWDG->KR = ((uint32_t)0x0000CCCC); // enable
IWDG->KR = ((uint32_t)0x00005555); // enable register access
IWDG->PR = ((uint32_t)0x00000006); // prescaler (no matter the value, but < 0x7)
IWDG->RLR = ((uint32_t)0x00000003); // reload (>= 0x4 OK, < 0x4 NOK)
while (IWDG->SR != 0x00u) {} // wait
// infinite loop
while (1) {
IWDG->KR = ((uint32_t)0x0000AAAA); // feed
}
}