JTAG DEBUG_JDI conflicts with FMC_NBL1 byte enable

[Giorgi_Kvernadze]

My target is a 144 pin version of the STM32H5.

I would like to implement both a JTAG and a FMC interface.
More specifically, a 24-bit muxed-PSRAM.

And I would like to output the Byte enable signals.

However on this package size, there is only one possible pin for NBL1, PA15.
Which is also the DEBUG_JDI pin.

Is there any way to route the value of NBL1 to another GPIO pin?

[mƎALLEm]

Hello @Giorgi_Kvernadze and welcome to the ST community,

I suppose you are using STM32H56x or H57x LQFP144 without SMPS. Right?

According to the datasheet it's not possible to route FMC_NBL1 to another GPIO. It's only available on PA15.

Why don't use Serial wire debug instead of JTAG interface?

[Giorgi_Kvernadze]

I might need to have the JTAG option available.

Is using the alternative pins of FMC_NBL1, that are not physically present on the 144 package, still a possibility?

Like afaik, they are still there on the chip itself, just aren't connected to a physical pin.

Can I somehow configure to use one of those and route their output to a free GPIO pin?

[mƎALLEm]

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@Giorgi_Kvernadze wrote:

Is using the alternative pins of FMC_NBL1, that are not physically present on the 144 package, still a possibility?

Like afaik, they are still there on the chip itself, just aren't connected to a physical pin.

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It's available internally on the die but not bounded/exposed externally off the chip.

 

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@Giorgi_Kvernadze wrote:

Can I somehow configure to use one of those and route their output to a free GPIO pin?

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I don't think it is doable. NBLx are signals managed by the FMC according to the CPU transactions and they are managed automatically by Hardware.

So I suggest to use another package that has NBL1 available outside PA15.

Think about LQFP144 SMPS package where FMC_NBL1 is available also on PB11.