Looking for sample code for Hyperflash erase/programming with OctoSPI

[GS1]

We started a project with Hyperflash and Hyperram (each on a separate OctoSPI port) with STM32H7A3.

I will need to flash the Hyperflash (S26KL512) via

1) Keil ARM Programmer (ULINK Pro) <- Needs a programming algorithm

2) By my own software parts for flashing firmware updates.

Is there meanwhile a sample project which I can refer to for more details?

Any help is very much appreciated.

BR GS

[Imen.D]

Hello @GS@S​ ,

I advise you to refer to the OSPI example within STM32CubeH7 MCU package:

\STM32Cube_FW_H7_V1.9.0\Projects\STM32H735G-DK\Examples\OSPI\OSPI_HyperRAM_MemoryMapped

You can use the code available in the example or get inspired to develop your application.

When your question is answered, please close this topic by choosing "Select as Best". This will help other users find that answer faster.

Imen

[GS1]

Ok, Imen, I already saw this example. This relates to HyperRAM usage in memory mapped mode, which is really helpful for the use of HyperRAM.

But I am looking for samples on HyperFlash. I need programming and erasing sample code and if available a programming driver for the Keil programmer part.

[Imen.D]

Unfortunately, there is no example available on HyperFlash with CubeH7 MCU package.

[Southbranch]

I have the same need..

GS@S - did you ever solved this matter?

ST - is there any example for ANY STM32 board using the S26KL512 HyperFlash, or any other HyperFlash?

[GS1]

As stated yesterday in the other question: This is one of the major tasks for our current project. Solution coded, but not yet tried on the board. This will happen in March/April.

I did not find an STM32 board using S26KL512 HyperFlash.

[Southbranch]

Hi!

Did you see my post: How to program simple data to OCTOSPI external flash? (st.com)

I still have not figured out how to read/write to the hyperflash. I have a custom board with the multichip S71KL256 which consist of a multiplexed HyperRAM (S27KL-series) and a HyperFLASH (S26KL-series). I have used the example settings + code given in AN5050.

The RAM works fine so I assume all signals works fine. In memory mapped mode I can read/write also to the flash, but so far no success to read ID or program the flash with permanent data.

@ST, please is this something you could consider to provide? There is also a Gen 2.0 of this multichip runnig at 166 MHz at 3.3V, S76HL512. A simple example how to read chip ID and program this chip would be great!

[Tesla DeLorean]

One of the bigger issues here is how difficult these parts are to prototype with. ​Without something in-hand it requires blind coding.

​

N​ot sure how much of this falls on Infineon's or ST's doorstep. TBH I think the benefit to sales falls more heavily on Infineon and their FAEs to get working examples on predominant platforms. They could always furnish me with hardware to tinker with.

[Southbranch]

I fully understand.

I will give it another try within the next weeks. If I fail again (likely..), I will consider sending you my hardware in case you would be interested to help out. Reimbursement of course.

[GS1]

Hello Southbranch,

In addition to my previous post I detected a wrong handling for the shifting of the adress:

Please take a close look to where the shift is done, because the target adress is not supposed to be shifted when it is used for the programming or read of data.

I therefore implemented a second declaration without the shift as seen below:

In S26KSxxxS_S26KLxxxS.h:

     #ifdef USER_SPECIFIC_CMD

       // ########### Shift Offset by 1 to the left !!! ################

        #define FLASH_WR(b,o,d) FlashWriteUserCmd( b,(o<<1),d )

        #define FLASH_WR_TO_TARGET_ADDRESS(b,o,d) FlashWriteUserCmd( b,(o),d )

       #define FLASH_RD(b,o) FlashReadUserCmd(b,(o<<1))

        #define FLASH_RD_FROM_TARGET_ADDRESS(b,o) FlashReadUserCmd(b,(o))

The FLASH_WR_TO_TARGET_ADDRESS and FLASH_RD_FROM_TARGET_ADDRESS  macros have to be used in lld_WriteBufferProgramOp and lld_ReadOp for the commands for write /read of the data.

Otherwise data is written to / read from the wrong address !

BR GS

[Southbranch]

Thanks for posting this!

It seems your function shifts the offset adress and not the base adress, right?

As a concrete example, could you please post the function calls you are doing in order to read the ID/CFI? It would be very helpful if you could include the exact inputs in terms of base adress, offset address and commands.

Many thanks in advacne

[GS1]

Yes, only the offset has to be shifted.

Simply download the cypress LL driver for NOR Flash (Infineon-Low_Level_Driver_for_NOR_Flash-Software-v01_00-EN.zip, can be downloaded from Infineon!). This includes all necessary functions and declarations for calls to write and read.

Then exchange the above mentioned FLASH_WR / RD implementations.

Here an example for status read:

FLASHDATA ReadStatus(void)

{

   FLASHDATA nStatus;

   nStatus = lld_StatusGetReg(HYPER_FLASH_BASE_PTR,0);

return Status;

}

Extract from the LL Driver:

/******************************************************************************

*

* lld_StatusRegReadCmd - Status register read command

*

* This function sends the status register read command before actually reading it.

*

* RETURNS: void

*

*/

void lld_StatusRegReadCmd

(

FLASHDATA * base_addr   /* device base address in system */

)

{        

 FLASH_WR(base_addr, LLD_UNLOCK_ADDR1, NOR_STATUS_REG_READ_CMD);

}

/******************************************************************************

*   

* lld_StatusGetReg - Gets the flash status register bits

*

*

* RETURNS: FLASHDATA

*

*/

FLASHDATA lld_StatusGetReg

(

FLASHDATA * base_addr,     /* device base address in system */

ADDRESS     offset         /* address offset from base address */

)

{

 FLASHDATA status_reg = 0xFFFF;

 lld_StatusRegReadCmd( base_addr );   /* Issue status register read command */

 status_reg = FLASH_RD( base_addr, offset );    /* read the status register */

 return status_reg;

}

I think you have to dig into the driver by yourself and understand how it works and then implement what you need.

BR GS

[Southbranch]

Hi!

What is your status on this issue now?

I have shifted to a more modern multichip the S76HL512 which has a combined RAM and FLASH running in a multiplexed mode. I can read/write to the RAM so I assume all signals are good.

Still struggling with the FLASH, all readings just return 0xFF:s..