Minimum Clock Speed, and enabling PSSI problem

[FA1234]

Hello, I'm just evaluating the STM32H7R3Z8 for a new project. I'm having two issues, possibly with the STM32CubeMX, or maybe I'm just not understanding the part.

1) No matter what I do, I cannot seem to enable PSSI. The combobox is grayed out with "Disable" selected. If I mouse over, it says, "DCMI and PSSI are an exclusive choice". DCMIPP is currently disabled for both Application and Boot profiles, and the combobox if I select DCMIPP is set to "Disable". See:

 

 

My reading of the datasheet (p.21) shows the STM32H7R3Z8J6 should have a 16-bit wide PSSI available.

2) I cannot seem to create a power profile running at lower than 300MHz (nor is there any data in the datasheet for power consumption at lower frequencies). Is it possible to run this component at 60MHz? Should I expect similar power consumption to an STM32H5 part at that speed? (Since consumption at 300MHz on the STM32H7 seems roughly equal to 250MHz on the STM32H5)

Thanks!

[STOne-32]

Dear @FA1234 ,

Welcome in our STCommunity ! 

I can not help on first question as it seems either linked to some configuration option or something like . Is that possible please for sanity check select instead a part number having the superset package in terms of I/Os that means TFBGA244 so 7R3L8xx instead in CubeMX and try again if still the same . The DCMIPP is sharing same physical pins as PSSI slave controller . I’m curious to know your use case if PSSI may be to connect an external FPGA ? 

Regarding question 2 : yes you can run for any  CPU speed even at 1MHz the system runs perfectly ( no min is set in the table ). However you can run in Low VOS to have optimized power consumption.  

In general for this MCU, many customers wanted the high speed 500MHz+ of Cortex-M7  to run heavy load .  It is very interesting to understand your case for better suggestions .

Hope it helps ,

STOne-32

[FA1234]

Thanks for the confirmation that I can run it at lower frequencies. Should I expect lowered power usage as well? The datasheet only goes down to 300.

To your question about use case, this component will be used in our product in two situations:

1. Where an FPGA is doing all the serious computation by itself, and the CPU is simply managing it and the overall system. In this case, running the CPU after boot quite slow to save power is sufficient.
2. Where an FPGA is passing a lot of data to the CPU (planned over PSSI) which is then transferred over USB. In this case, maximum CPU speed to ensure we can transfer as much data as possible is the goal.

I'd like to dynamically switch between the two, depending on whether USB is attached or not.

I hope this is consistent with the capabilities of this part?

Thanks!

 

[STOne-32]

Dear @FA1234 , @Imen.D 

Thank you for the fix using CubeMX latest version :) and supporting this new part . 

much appreciated for the use case, indeed this  is why we implemented the PSSI for a very simple Synchronous parallel transmission using an FPGA as example, while receiving a clock from an external controller .

Just to pay attention to always being with the right ratio of 0.4 between HCLK and PSSI_CLK, so if maximum HCLK is set to 60MHz , PSSI clock should not exceed 24MHz * 16bits data you can have 48Mbytes/s bandwidth to transmit to USB High speed . It should work perfectly.

 Wish you a great design !

Ciao

STOne-32

 

[Imen.D]

Hello @FA1234 and welcome to the Community :)

Make sure to download and use the latest release of STM32CubeMX (version 6.12.0).

I checked your use case (with STM32H7R3Z8 device) and enabled the PSSI without issue.

You can enable the PSSI. Then set the PSSI parameters (select a 16-bit interface, hardware control signals...) from the PSSI Mode Configuration Menu.

 

[FA1234]

It turned out I did not have the H7LS package installed, but only the H7. The result was that PSSI wasn't enable-able! After installing, all worked fine. Thanks for the quick help!