Misleading information in STM32 datasheets regarding NRST

[mbenkmann]

All STM32 datasheets seem to have the Figure "Recommended NRST pin protection" copied and pasted. This figure suggests that an external reset circuit consisting of a BUTTON AND CAPACITOR is recommended to "protect the device against parasitic resets". This is in direct contradiction to training manuals like https://www.st.com/resource/en/product_training/STM32G0-System-Reset-and-clock-control-RCC.pdf (which says on page 7 that no external components are required) and marketing materials that suggest that a benefit of MCUs like the G0 series is that they require a minimal amount of external components.

I've seen people on internet forums insist that the 100nF capacitor is necessary even if there is no button or anything else connected to NRST. They always cite the "protection against parasitic resets".

In other words, conventional wisdom in the STM32 community seems to be that EVERY SINGLE STM32 MCU IN EVERY SINGLE APPLICATION requires a mandatory capacitor connected to NRST, that you CAN NOT just leave the NRST pin floating in your circuit.

I think the datasheets should be changed to make clear what is the truth.

Can NRST be left floating?

Or does EVERY application require a capacitor on NRST?

[waclawek.jan]

The capacitor is a recommendation, not mandatory.

The NRST input characteristics table contains the NRST pin characteristics. If you can ensure, that in your application there is no source of interference which would produce a negative pulse longer than the NRST input filtered pulse parameter (70ns) on the NRST pin which is pulled up by the nominally 40kOhm internal resistor, the capacitor can be omitted.

The recommendation takes into account typical interference sources (e.g. from wireless transmitters such as mobile phones, in the vicinity of the device), so you probably have to take extra steps to shield your application from such sources. Compare that to cost of the 100nF capacitor (yes I know there are applications where that's not the only consideration, e.g. severely space constrained ones).

Btw., you don't need to have VDD decoupling capacitors, either, if you are able to ensure rock stable noise-free VDD in other means; so in the same spirit as your post, that would invalidate the Power supply scheme figure, too.

JW

[ONadr.1]

There is a difference between leaving the NRST pin unconnected and routing it to a cable or PCB to a button. Here it is possible that induced voltage spikes will inadvertently activate the MCU reset. So a capacitor is recommended in those cases, which works as a glitch filter.