Missing section IRTIM in STM32U0 RM and more.

[AA1]

1. According to datasheet, STM32U0 family have an IRTIM (Infrared interface). But this section is missing in RM0503. Also in SYSCFG_CFGR1 there is missing IR_MOD and IR_POL bits.

2. In RTC section Figure 297 it is missing RTC_OUT2 and RTC_REFIN pins. See same block for STM32G0 family.

3. In RM0503 section NVIC table 54, I think that PVD_PVM should be PVD / PVM. Also ADC_COMP should be ADC / COMP. WWDG should be WWDG / IWDG. TIM6_DAC / LPTIM1 should be TIM6 / DAC / LPTIM1.

4. Usually each section name ends with an abbreviated name in parenthesis. Ex: Low-power universal asynchronous receiver transmitter (LPUART). And this abbreviated name is also in bookmarks on the left size of each RM. But (LPUART) is not in bookmarks in several RM possible all from the beginning.

 

[STTwo-32]

Hello @AA1 

Thank you so much for your contribution. I will report this internally for modifications on the next releases for the three first points. For the last point, can you give more explanation.

Best Regards.

STTwo-32

[AA1]

The blue text on the left should also end with (LPUART). I know this is insignificant and I just talked about this because I wrote this post due to other things.

 

[STTwo-32]

Hello @AA1 

This is included on the Rev 2 of the doc. Could you please check.

Best Regards.

STTwo-32 

[AA1]

Register AES_IER also doesn't exist. But possibly just need to replace AES_ICR and AES_IER by AES_CR.

[AA1]

Hello,

I have more.

1. AN5938 page 15:
"Twelve frequency ranges are available: 100 kHz, 200 kHz, 400 kHz, 800 kHz, 1 MHz, 2 MHz, 4 MHz (default value), 8 MHz, 16 MHz, 24 MHz, 32 MHz, and 56 MHz".
Here 56 should be 48

2. RM page 176: "The software must set this bitfield so as not to exceed 54 MHz on this clock."
Here 54 should be 56.

 

3. RM page 168:
"When leaving the Stop 0 or Stop 1 modes, HSISYS becomes automatically the system clock.
When leaving the Standby and Shutdown modes, HSISYS (with frequency equal to HSI16) becomes automatically the system clock".

Missing Stop 2 mode and the clock is not HSISYS. Clock is selected by STOPWUCK bit and can be MSI or HSI16.

 

4. RM page 159: The HSISYS clock derived from HSI16 can be selected as system clock after wake-up from Stop modes (Stop 0 or Stop 1).
Should be:
The HSI16 can be selected as system clock after wake-up from Stop modes (Stop 0, Stop 1 or Stop 2).

5. RM page 166: "This function remains available in Stop 0, Stop 1 and Standby modes".
Missing stop 2 mode.

6. RM tables 92, 197 and 208
Missing stop 2 mode. As stop 2 mode is a new mode it is missing in some cases.

 

7. RM0031 page 363:
0: Off - OC1 is not active. OC1 level is then a function of the MOE, OSSI, OSSR, OIS1, OIS1N and CC1NE bits.
I think this should be just:
0: Off - OC1 is not active.

8. RM page 109: In Standby mode step is repeated. The second should be deleted

9. RM page 61: TIM1/15 should be TIM1/15/16.

10. As there exists LSECSS, HSECSS* is a better name for CSS on HSE. And this name is used in some RMs.

 

12. RM table 178 word BKPRAM. As I said before, STM32U0 doesn't have backup SRAM. At least I think this.

 

13. Which is the clock when CSS on HSE failure is detected?
See STOPWUCK bit. Clock can be MSI or HSI16
But CSS section doesn't talk about this bit. STM32H5 RM talks.

14. For STM32U0, USB RAM is 1K. But on some pages it appears as 2048 bytes. For STM32G0 it is 2K. Also as "USB RAM2" doesn't exist, "USB RAM1" should be "USB RAM". But this is just a detail.

 

15. DS talks about "Batch acquisition mode (BAM)". What is this? I didn't find this in RM. Maybe this is used with ADC.

 

Best regards,

 

[AA1]

Hello,

1. Several EXTI lines in vector table don't are according to table 58.
   For example: RTC and TAMP interrupts (combined EXTI lines 19 & 21)
   Should be:
   For example: RTC and TAMP interrupts (combined EXTI lines 28 & 29)
2. RM page 164: CSSI should be CSSF and LSECSSI should be LSECSSF.

Best regards,

 

[Alex409]

Thanks for the detailed observations — these discrepancies in the RM documentation can certainly be confusing. It would be great if ST could address them in an update or errata. Have you reported them to support or the forums yet?