Need suggestion on generating PWM waveform

[sanmveg]

Hi All

I have a digital power converter topology (H-bridge) which requires waveform to look like the following:

As can be seen in the above, complementary waveform is being sent on bottom 2 channel in 1st 10ms and then they are being in the IDLE state while complementary waveform is being sent on other 2 channels in next 10ms.

I have achieved above using HRTIM (TIMERA and TIMERB) and TIM17.

The issue is that TIM17 interrupt the CPU and in the interrupt (in this case, at a freq. of 50hz), HRTIM outputs are being enable and disabled using the following code:

void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
{
 /* USER CODE BEGIN Callback 0 */

 /* USER CODE END Callback 0 */
 if (htim->Instance == TIM16)
 {
 HAL_IncTick();
 }
 /* USER CODE BEGIN Callback 1 */

 if(htim->Instance == TIM17)
 {
 static uint8_t toggle = 0;
 toggle = !toggle;
 HAL_GPIO_WritePin(GPIOC, GPIO_PIN_0, toggle ? GPIO_PIN_SET : GPIO_PIN_RESET);
 HAL_HRTIM_WaveformOutputStop(
 &hhrtim1, 
 HRTIM_OUTPUT_TA2 + HRTIM_OUTPUT_TA1 + HRTIM_OUTPUT_TB2 + HRTIM_OUTPUT_TB1
 );
 HAL_HRTIM_SoftwareReset(&hhrtim1, toggle ? HRTIM_TIMERINDEX_TIMER_A : HRTIM_TIMERINDEX_TIMER_B);
 HAL_HRTIM_WaveformOutputStart(
 &hhrtim1, 
 toggle ? (HRTIM_OUTPUT_TA2 + HRTIM_OUTPUT_TA1) : (HRTIM_OUTPUT_TB2 + HRTIM_OUTPUT_TB1) 
 );
 }

 /* USER CODE END Callback 1 */
}

 

And this CPU intervention is something that I am trying to get rid of.

I would rather prefer to have hardware to generate the above waveform without CPU intervention. However, I have not been able to find any useful feature which would help me generate the above waveform (Closest is Burst Mode in HRTIM, but it applies burst to all the channel equally, which is not what I want). And this is where I need help!

Thanks 

[TDK]

You could use a slave timer to generate the smaller pulses and have it gated by a master timer which provides the 10ms on, 10ms off.

[sanmveg]

Hello TDK

do u mean to use TIM1 in gated mode?

 

[TDK]

You need multiple timers. Look at "Slave mode: Gated mode" in the reference manual.

Say TIM1 is the master, set TRGO and TRGO2 to drive TIM2 and TIM3 which generate the smaller pulses.

[Michal Dudka]

You can use TDKs method (master timer gates slave timer which generates PWM), but AFAIK you will have to care about output status of slave timer during "gate off" (gated off timer freeze its outputs in last state ?). Generaly this method can be "absolute" precise (to single clock period).

Or you can consider another approach. Set some timer to generate periodic DMA request, and let DMA to reconfigure your HRTIM.