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December 12, 2024
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NRST trigger duration STM32H743XIH

  • December 12, 2024
  • 1 reply
  • 628 views

We are having trouble understanding the NRST pin characteristics.

The STM32H742xI/G STM32H743xI/G datasheet gives these parameters:

Yasmine_0-1734012021385.png

I have three questions:

1. What does 'input filtered' and 'input not filtered' pulse mean?

2. Is it by design true that a filtered reset trigger with a duration shorter than 50ns, will never be detected?

3. We use a 3.3V Vdd. Does a not-filtered pulse require 300ns or 1000ns duration to detect a reset?

 

    This topic has been closed for replies.
    Best answer by TDK

    1. In this sense, "filtered" means the pulse is filtered out and doesn't produce a reset.

    2. Yes. I would test it on your board and in your noise environment if you require this functionality. Noise on the pin can cause spurious resets, hence the recommendation for a decoupling cap close to the NRST pin.

    3. Almost assuredly 300ns, despite the ambiguity in the datasheet. Lower voltage (i.e. 1.62 V to 1.71 V) will require a longer pulse.

    1 reply

    TDKAnswer
    Super User
    December 12, 2024

    1. In this sense, "filtered" means the pulse is filtered out and doesn't produce a reset.

    2. Yes. I would test it on your board and in your noise environment if you require this functionality. Noise on the pin can cause spurious resets, hence the recommendation for a decoupling cap close to the NRST pin.

    3. Almost assuredly 300ns, despite the ambiguity in the datasheet. Lower voltage (i.e. 1.62 V to 1.71 V) will require a longer pulse.