OctoSPI write operations on memory mapped mode are allowed, but not recommended. Need more info.

[LPats.1]

Both STM32H730 datasheet and application note AN5050 mentions that a write operation can be performed on external Flash memories through the OctoSPI peripheral.

However, the STM32H730 reference manual (RM0468), has the following info on section "25.4.14

OCTOSPI Regular-command mode configuration":

In Memory-mapped mode, the external device is seen as an internal memory but with some latency during accesses. Read and write operations are allowed to the external device in this mode.

It is not recommended to program the Flash memory using memory-mapped writes, as the internal flags for erase or programming status have to be polled.

So, write operations are allowed, but not recommended? How is that? Is their behavior not guaranteed?

I'd like to use a QSPI / OctoSPI as an external code memory, but this seems like a big drawback. How could I perform writes to a QSPI / OctoSPI memory

in memory mapped mode, if write operations aren't recommended?

[Tesla DeLorean]

>>How could I perform writes to a QSPI / OctoSPI memory in memory mapped mode, if write operations aren't recommended?

You'd disable memory-mapped mode, and interact directly with it, and also stop other potential interactions with the memory, ie from interrupts, or execute-in-place.

Writes to RAM devices would be workable as the transaction complete immediately. NOR Flash devices are relatively slow, and you can't interact with the devices whilst they are busy, see datasheets/manuals for the memory ICs, understand how they function.

[LPats.1]

Thanks, that's the alternative to write to memories using the OctoSPI interface.

What upsets me is that the write operations on memory mapped mode are mentioned on datasheets and AN5050, but the reference manual states that they are not recommended. If they are not recommended, why are they available and stated on these other documents?

Conflicting and misleading information.

[Tesla DeLorean]

Depends on what your specific memory device facilitates, which is beyond the purview of the STM32.

The STM32 is capable of doing things that may or may not be viable on any given device, so it would help to understand the functionality of both, rather than make assumptions or be annoyed that some particular mode is not viable.

>>Conflicting and misleading information.

I'm guessing you've not used/programmed common QSPI NOR Flash devices from Micron, SST, Winbond, Macronix much.. or devices with significant asymmetry in the read / write modes based on typical use patterns, ie predominantly Read Only.

You're trying to run an MCU at 550 MHz, and write to a memory at 20-80 KHz

[ChahinezC]

Hello @Community member​,

The OCTOSPI support both read and write operations in memory mapped mode. When memory mapped mode is enabled with Regular command protocol the OCTOSPI will send the Read/Write preconfigured Instructions in OCTOSPI_IR/OCTOSPI_WIR whenever the memory mapped region is accessed in Read/Write request.

However concerning the external device's write protocol it differs between the memories.

For external PSRAM they can be written in a single step using a single write command.

For external FLASH memories a (write Enable command + a poll on the memory's status register) is required before making any write operation. So writing to external FLASH memories in memory mapped mode is supported when a Write enable procedure is made before enabling the memory mapped mode in condition that the write operation is not interrupted.

Chahinez.

[mmurty]

How can we achieve to do firmware upgrades when this is the case?