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January 30, 2024
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overwriting the data registers of the ADC and DAC in STM32G4

  • January 30, 2024
  • 1 reply
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On STM32G474, I have a loop where I read ADC values, process them, and write the result to DAC.

I am using the dual ADC mode and reading ADC12_COMMON->CDR . I do not care if I read the previous conversion result, in this case, is there a reason to check and reset ADC_ISR_EOS ? Does the CDR always contain the last conversion result ?

Similarly, when using the DAC, can I continuously (most probably faster than DAC update rate) write to DAC_DHR12R1 without checking any flag ? I do not care if I overwrite the previous value before it is transferred to DAC_DOR.

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    Best answer by TDK

    > in this case, is there a reason to check and reset ADC_ISR_EOS ? Does the CDR always contain the last conversion result ?

    You don't need to clear EOS if you don't care about it--the ADC will still convert. You may want to set OVRMOD to ensure the register always has the latest conversion.

    TDK_0-1706622528749.png

    > Similarly, when using the DAC, can I continuously (most probably faster than DAC update rate) write to DAC_DHR12R1 without checking any flag ?

    Yes.

    1 reply

    TDKAnswer
    Super User
    January 30, 2024

    > in this case, is there a reason to check and reset ADC_ISR_EOS ? Does the CDR always contain the last conversion result ?

    You don't need to clear EOS if you don't care about it--the ADC will still convert. You may want to set OVRMOD to ensure the register always has the latest conversion.

    TDK_0-1706622528749.png

    > Similarly, when using the DAC, can I continuously (most probably faster than DAC update rate) write to DAC_DHR12R1 without checking any flag ?

    Yes.