Skip to main content
Explorer II
August 14, 2024
Question

Phase shift issue in pwm generation

  • August 14, 2024
  • 2 replies
  • 1201 views

Hii everyone,

I am working on an inverter application . trying to implement unipolar pwm in the center-aligned mode 2. I am using DMA for the buffer transmission for the sine-wave PWM. Everything seems well without the pwm synchronization. i am initializing DMA one by one

 

 

 

	HAL_TIM_PWM_Start_DMA(&htim1, TIM_CHANNEL_1, (uint32_t*) pwmData0, 20000);
	HAL_TIM_PWM_Start_DMA(&htim1, TIM_CHANNEL_2, (uint32_t*) pwmData1, 20000);

 

 

 

and at the output the second phase is lagging by 5-6 pwm pulses. time period for 1 pwm pulse is 10us. 

skuma8_0-1723614431476.png

Here is the snap of logic analyzer.

According to the post USING MASTER SLAVE CONFIG issue still remains the same.

Any suggestion would be highly appreciable.

ThankYou.

    This topic has been closed for replies.

    2 replies

    Super User
    August 14, 2024

    Not sure HAL is going to support starting everything at the same time, you might need to write your own code to do this. Probably if you set up the timer as a slave in gated mode, ran those functions, then started the master timer it would work using HAL functions.

    skuma.8Author
    Explorer II
    August 22, 2024

    Hi TDK ! ,

    by "Not sure HAL is going to support starting everything at the same time", do yo mean i'll have to switch over bare-metal?

    Super User
    August 22, 2024

    Potentially. Or use another timer as master and have this one in gated mode.

    In any case, it's expected that the code you wrote starts one channel at a time.

    Explorer
    August 22, 2024

    What is uCPU? 

     AFAIK most of ST micro supports DMA Burst Mode, so you don't need two dma channels, (likely two channels have delay in between transactions)

    just one channel that updates two consequtive CCR1 & CCR2 registers (could be more than 2 if necessary).  Read Reference Manual for more details. 

    Also set Autopreload option to gurantee channels simultanenous updates at timer TRGO event.