Possible to disable external reset on STM32G4?

[jacobq]

I am aware of the special bits to stop the IWDG and WWDG while the core is halted, but is there a way (option byte, SWD command, SFR, etc.) to configure an STM32G4 so that it will ignore the nRST pin being pulled low?

 

I am particularly interested in being able to reprogram the MCU using SWD without being disrupted by an external supervisory IC. I am guessing this is not possible without changing hardware (forcing reset high with debug pod or appeasing the supervisory IC) but wanted to check. 

[TDK]

Yes, on the STM32G4 series you can set the NRST_MODE option byte to 10 so the PG10/NRST pin functions only as a GPIO.

 

[jacobq]

Thank you for the suggestion! I had forgotten about the option of changing the pin function in software. Is this possible to do via SWD (without having a running program)? The problem I'm trying to solve is performing the initial programming without splitting the program into a small loader (which can be programmed fast enough to avoid reset and then refresh the watchdog IC while it programs the application section).

[TDK]

Yes, you can change the option bytes using STM32CubeProgrammer in the OB tab. Ther is also a command-line version of STM32CubeProgrammer that you could use. SWD will connect if no program is loaded.