Solved
Problems with H723ZG and ADC with DMA after integrating ETH and LWIP.
Dear STMicroelectronics community,
My name is John Peterson, and I am trying to develop on the NUCLEO-H723ZG board.
I am having a hard time figuring out how to make ADC with DMA and ETH/LWIP work concurrently.
If I create a new STM32 project with my H723ZG as the target, and configure ADC1 as per this tutorial video (which includes setting up the DMA for the ADC), everything works great:
Here's some of the code that I incorporated into my main.c file:
/* USER CODE BEGIN PV */
int adcEnd = 0;
#define ADC_BUF_LEN 2000
uint16_t adc_buf[ADC_BUF_LEN];
/* USER CODE BEGIN 4 */
void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef *hadc)
{
if (hadc == &hadc1)
{
adcEnd = 1;
}
}
void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc)
{
int errorCode = hadc->ErrorCode;
}
uint16_t* process_request_adc()
{
adcEnd = 0;
memset(adc_buf, 0x00, sizeof(adc_buf));
// Trigger the ADC.
HAL_ADC_Start_DMA(&hadc1, (uint32_t*)adc_buf, sizeof(adc_buf));
// Wait for the ADC collection to complete.
while(!adcEnd)
{
HAL_Delay(10);
}
return adc_buf;
}
If I invoke process_request_adc() from main() after everything initializes it functions exactly as hoped. The adc_buf[] array is populated with values that I would expect to see from the ADC.
However, once I integrate and configure ETH/LWIP -- even withOUT using any ETH/LWIP features (this includes disabling the LWIP initialization) -- the ADC no longer seems to update the buffer. All the ADC calls seem to execute as before but the adc_buf[] remains unchanged, even after the HAL_ADC_ConvCpltCallback() returns successfully. There is no indication of error. Whatever value I memset() into the adc_buf[] remains in that array.
I configured the ETH/LWIP elements akin to these videos:
Doing a web search revealed a couple of STM32 community posts on issues similar to ours:
However, in reviewing these threads, and the proposed links therein, there really didn't seem to be any actionable advice.
I've reviewed the memory aspects. It seems that the ETH/LWIP/MPU is configured to use the start of SRAM1 (0x3000000), and that's pretty much the default values/ranges that were proposed when enabling ETH/LWIP. As per the videos, I enabled the IOC's System Core -> CORTEX_M7 -> Parameter Settings -> Cortex Interface Settings and enabled both the CPU ICache and DCache. I modified several other parameters in that section, and updated the linker file (Flash.id) accordingly. The ETH/LWIP functionality works great!
The adc_buf[] is in application variable space, so far away from the ETH/LWIP memory space. I can use the Build Analyzer in the CubeIDE to see the Memory Regions and Memory Details for these aspects and know that they're in discrete areas. But maybe there are other memory regions associated with the ADC/DMA and ETH/LWIP for which I'm unfamiliar?
To recap, the ADC/DMA aspects were working before ETH/LWIP was integrated. Afterwards, it's as if the ADC/DMA no longer updates the associated buffer but no errors appear to manifest. How can I debug and fix this to get the ADC/DMA to work again with ETH/LWIP?
Thanks for your consideration!
Very kind regards,
John Peterson