PWM mode and ARPE bit | Confirmations
Hi everyone,
I am dealing with the configuration of a PWM in center-aligned mode in the context of the stm32H755 MCU. Such PWM is managed using TIM1 as "driver". The application requires to change every 100 us (TIM1 period) the ARR register to make it last a little bit longer/shorter at every cycle.
I am running into the issue of updating the ARR register and noticing that while the expected output duty should be 100%, it is not. A very small peak down can be seldomly noticed on the oscilloscope.
As of today, the only solution I have implemented is the check for up-counting and downcounting of TIM1 (100 us + 100 us), updating the ARR register only in down-counting instances, avoiding the peak. But in this case the control running in the background is underperforming, actuating once every 2 hits.
I have found on the datasheet the ARPE bit, for what concerns my application I think it might help in my case but i would love to have some confirmations. Do I avoid the "peak issue" just setting this bit and updating the ARR whenever in the upcounting/downcounting phases? It will be updated at the beginning of the next phase, regardless the counting direction?

Thanks very much for the support.
Zack
