QSPI mapping of pins IO4 - IO7 to the normal 4 data lines (D0..D3) of QSPI NOR FLASH

[Ricko]

Hi,

I configured the STM32U5G9VJT6Q to use QSPI to interface to a NOR FLASH ( MT25QL128ABA1EW9-0SIT ).

Because of other connectivity, the only option for the data lines (Data [3..0] as highlighted in yellow in the attached screenshot) is "Port 2 IO [7..4]". All other options in the drop-down menu next to "Data [3..0]" are either red or disabled.

I need to be absolutely sure of the connectivity and that it will work (preferably using the HAL drivers).

Does that configuration work?

With reference to the pins table in the attached screenshot, do I need to connect the data lines as follows:

 

- PH9 (P2_IO4) connected to QSPI flash memory Data 0

- PH10 (P2_IO5) connected to QSPI flash memory Data 1

- PH11 (P2_IO6) connected to QSPI flash memory Data 2

- PH12 (P2_IO7) connected to QSPI flash memory Data 3

 

or in some other ways?

Thank you

 

 

[KDJEM.1]

Hello @Ricko,

 

Firstly, the IO[7:4] can be mapped to Data [3..0]  because IO[7:4] can be used as possible remap for quad-SPI mode as mentioned in RM0456 Section 28.4.3 OCTOSPI interface to memory modes.

Secondly, thanks to OCTOSPI I/O manager matrix, the user can set a fully programmable premapping of functions:
• Any OCTOSPIM_Pn_CLK / OCTOSPIM_Pn_NCLK pair can be mapped independently to OCTOSPI1_CLK/OCTOSPI1_NCLK or OCTOSPI2_CLK/OCTOSPI2_NCLK
• Any OCTOSPIM_Pn_DQS can be mapped independently to OCTOSPI1_DQS or OCTOSPI2_DQS
• Any OCTOSPIM_Pn_NCS can be mapped independently to OCTOSPI1_NCS or OCTOSPI2_NCS
• Any OCTOSPIM_Pn_IO[3:0] and OCTOSPIM_Pn_IO[7:4] can be mapped independently to OCTOSPI1_IO[3:0], OCTOSPI1_IO[7:4], OCTOSPI2_IO1[3:0] or OCTOSPI2_IO[7:4]

For more information, please see section 29.4.3 OCTOSPIM matrix in RM0456.

 

Thank you.

Kaouthar

 

[Ricko]

Thank you @KDJEM.1 

[mƎALLEm]

Hello @Ricko ,

If @KDJEM.1 answred your question please accept her comment as solution.

Thank you.