quad-spi over an octal-spi on an STM32H723XX

[Manojkumar Subramaniam]

Is there a working sample code that interface quad-spi over an octal-spi on an STM32H723XX mcu?

Has anyone tested such a scenario?

[Andreas Bolsch]

Where is the point here? Just take example code for e.g. stm32h7b3i-disco or stm32h735g-dk boards (these are contained is the STM32Cube_FW_H7_Vx.xx package) and adjust the transfer settings from

HAL_OSPI_*_8_LINES to HAL_OSPI_*_4_LINES (in mx25lm51245g.c) and the commands from 16-bit to 8-bit format (these are the MX25LM51245G_OCTA_* defines in mx25lm51245g.h). Furthermore, most octal chips use dummy address and dummy bytes for various commands like Status Register Read, but that depends on the flash chip, not on octal vs. quad. And only 4 GPIOs for data have to be set up instead of 8.

Except for the transfer mode settings in OCTOSPI_CCR and the 16- vs. 8-bit-instruction format there is little difference between octal and quad.

[ankit_acl]

I am curious to know that how quad spi would work with MX25LM51245G flash memory where it supports only SPI and OSPI mode for communication. Practically, it does not have an opcode for the quad mode also. If we use quad mode interface then it would be the waste of the MCU pins because in any condition if we use quad mode with OCTOSPI peripheral configuration where the peripheral IC is not supporting quad mode. So, at the end of result may we do not get the output what we expect by communication/ interface point of view.

If you could share your thoughts further that may help me to implement and use the quad spi instead of octo spi. Thank you,

Ankit

[Tesla DeLorean]

Why?

With all the availability of large QSPI devices why would you even waste time on this? Makes no sense.

The data sheet for the memory should reflect the available modes and commands.