Question about Receive Only Master (SPI_DIRECTION_2LINES_RXONLY)

[pass3master]

This is a question about Receive Only Master (SPI_DIRECTION_2LINES_RXONLY).

I was able to output the waveform shown in the attachment using Receive Only Master.

However, no data is being received(tmp). Why is this?

 

The process is performed in the following order:

HAL_SPI_Receive_IT(&hspi2, tmp, data_size);

HAL_SPI_Transmit(&hspi4, g_rx_temp_register, data_size, 1000);

hspi2(Receive Only Master)

hspi4(Transmit Only Slave)

 

About the waveform in the attached image

1ch hspi2 clock

2ch hspi2 MISO

[Andrew Neil]

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@pass3master wrote:

The process is performed in the following order:

HAL_SPI_Receive_IT(&hspi2, tmp, data_size);

HAL_SPI_Transmit(&hspi4, g_rx_temp_register, data_size, 1000);

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Again, please see the Posting Tips for how to properly post source code:

https://community.st.com/t5/community-guidelines/how-to-write-your-question-to-maximize-your-chances-to-find-a/ta-p/575228

like this:

HAL_SPI_Receive_IT(&hspi2, tmp, data_size);

HAL_SPI_Transmit(&hspi4, g_rx_temp_register, data_size, 1000);

Why are you doing two transfers?

which one is shown by your scope trace?

Why is the first one non-blocking (interrupt-driven), but the second is blocking?

The HAL_SPI_Receive()  will not have completed when you call HAL_SPI_Transmit() - so the HAL_SPI_Transmit() will be returning an error.

You should always check the return results!

HAL_StatusTypeDef result;

result = HAL_SPI_Receive_IT(&hspi2, tmp, data_size);
if( result != HAL_OK )
{
 Error_Handler();
}

result = HAL_SPI_Transmit(&hspi4, g_rx_temp_register, data_size, 1000);
if( result != HAL_OK )
{
 Error_Handler();
}

 

See this thread about receive-only master:

https://community.st.com/t5/stm32-mcus-embedded-software/hal-spi-receive-it-also-transmits/td-p/737532

Note that HAL does not use the receive-only Master - internally, HAL_SPI_Receive() calls HAL_SPI_TransmitReceive()

[pass3master]

I forgot to point that out. Sorry.

The reason for the two transfers is that the customer has requested that the pins used for spi2 and spi4 be separated.

spi2 is the master receiving pin, and spi4 is the slave transmitting pin. Also, the spi2 clk line and the spi4 clk line are connected.

I'm sorry, I'm a beginner. What is a scope trace?

The reason for the distinction between non-blocking and blocking is that we want to perform the spi4 transfer process while the spi2 master's receiving clk is being output.

This is an abstract explanation, but spi4 must transfer using the clk output by the spi2 master. This is a customer request.

I think my settings are probably wrong. I understand that.
What kind of settings are necessary to achieve the above?

[Andrew Neil]

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@pass3master wrote:

spi2 is the master receiving pin, and spi4 is the slave transmitting pin. Also, the spi2 clk line and the spi4 clk line are connected.

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This makes no sense!

Why are you using two SPI peripherals?

Again, show your schematic:

https://community.st.com/t5/community-guidelines/how-to-write-your-question-to-maximize-your-chances-to-find-a/ta-p/575228

 

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@pass3master wrote:

What is a scope trace?

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"scope" is short for "oscilloscope" - this is a scope trace:

 

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@pass3master wrote:

I'm sorry, I'm a beginner. 

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Does your customer know this?

Do you not have supervisors or colleagues to help you?