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Visitor II
June 19, 2024
Solved

RAMCFG_MxCR ECCE bit not set even after SRAMxECC is enabled(0) in FLASH_OPTR

  • June 19, 2024
  • 2 replies
  • 1088 views

Hi,

I have enabled option bit SRAMxECC is in FLASH_OPTR by following sequence mentioned in datasheet to enable SRAM ECC, However RAMCFG_MxCR ECCE still shows as 0(disabled). Please do the needuful.

harisuvarna_0-1718831916888.png

 

    This topic has been closed for replies.
    Best answer by harisuvarna

    ECCE bit in register RAMCFG is setting to 1 after I enable clock for RAMCFG module in RCC register 

    harisuvarna_0-1719245070771.png

    Thanks,

    Hareesha

    2 replies

    Technical Moderator
    June 21, 2024

    Hello @harisuvarna 

    Check the STM32U5 Errata, you may have the same condition described in section: SRAM ECC error flags and addresses are updated only if interrupt is enabled.

    ImenD_0-1719000893783.png

    Visitor II
    June 21, 2024

    Hi Iman,

    Thank you for the response. I do enable RAM ECC interrupts in register RAMCFG_MxIER.  

    Section 6.3.2 of ST User Manual (RM0456) says following

    harisuvarna_0-1719004750896.png

    But ECCE bit is not automatically set even though SRAM ECC is enabled in FLASH_OPTR. 

    Regards,

    Hareesha

     

    harisuvarnaAuthorAnswer
    Visitor II
    June 24, 2024

    ECCE bit in register RAMCFG is setting to 1 after I enable clock for RAMCFG module in RCC register 

    harisuvarna_0-1719245070771.png

    Thanks,

    Hareesha