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EelcoB
Visitor II
April 11, 2024
Solved

Reset or glitch during Option Byte programming

  • April 11, 2024
  • 2 replies
  • 1282 views

We have a design based on the STM32G0B1CET6 MCU.

Recently we noticed some failing parts after power on/off testing. Symptoms: software is no longer running and the SWD port is not responding. We sent the broken parts to ST for analysis. The report (C241043257) showed that the FLASH status register has bit 15 (OPTVERR) set. This indicates a mismatch on option byte loading, which can be caused by a reset or glitch during the option byte programming phase.

After analyzing our code, we found that at each startup the firmware writes 0xBB to the RDP option byte.

We are quite sure this caused the issue, but what we would like to have confirmed is:

If 0xBB is written to the RDP option byte, while is already set to 0xBB – will that still make the chip vulnerable to a reset or instable power supply?

 

A related question:

At the end of a firmware update, we do a bank swap, which requires writing to an option byte. That will also introduce a brief moment where the chip can be bricked if power supply is unstable. I know the manual warns against this, but is there a way to eliminate this risk?

      This topic has been closed for replies.
      Best answer by Andreas Bolsch

      As soon as you trigger option byte programming, the whole option byte block ist erased and rewritten completely with the currently desired settings (in flash registers). So, even if the new setting is identical to the "old" one, a whole erase-write cycle takes place ... If you do this unconditionally at each startup, you're asking for trouble.

      I think the only way to reduce the risk during bank switching is: Ensure by suitably large capacitor (and maybe isolation of this cap by schottky diode, or by disabling supply from this cap to other parts of the module) that power supply will be stable long enough for programming to complete. Turn off all outputs (as these might cause current drain), disable any interrupts. Ensure no reset could take place during this period. Watchdog?!

       

      2 replies

      A
      Andreas BolschAnswer
      Explorer II
      April 11, 2024

      As soon as you trigger option byte programming, the whole option byte block ist erased and rewritten completely with the currently desired settings (in flash registers). So, even if the new setting is identical to the "old" one, a whole erase-write cycle takes place ... If you do this unconditionally at each startup, you're asking for trouble.

      I think the only way to reduce the risk during bank switching is: Ensure by suitably large capacitor (and maybe isolation of this cap by schottky diode, or by disabling supply from this cap to other parts of the module) that power supply will be stable long enough for programming to complete. Turn off all outputs (as these might cause current drain), disable any interrupts. Ensure no reset could take place during this period. Watchdog?!

       

        J
        Jacob WOODRUFF
        ST Employee
        April 11, 2024

        Hi All,

         

        This post has been escalated to the ST Online Support Team for additional assistance. We'll contact you directly.

         

        Regards,
        Jake

        ST Support

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