RMII diagrams

[StefanoRossi]

Hi, we are working with a STM32F217 and the RMII bus.

In the two documents reported I see an inconsistency on the diagrams (on the one hand rising edge sampling, on the other falling edge). Which one is correct for my chip?

RM0033 Figure 328 Reference Manual (01 Mar 2021) 

DS6697 Figure 48Product Specification (05 Sep 2016) 

 

BR

Stefano

[Imen.D]

Hello @StefanoRossi and welcome to ST Community,

Thank you for having reported the point.

I escalated this request to involved people for review and take the necessary action.

(Internal ticket number: 191487 - this ticket number is only for reference, not available outside of ST)

I'll make sure to post updates here as soon as possible. 

[Imen.D]

Hi @StefanoRossi ,

The RMII operates using the rising edge of the clock signal for both TX and RX data transfers.

So, the DS6697 Rev 13 - Figure 48. Ethernet RMII timing diagram is the correct one.

This RM0033 will be updated to fix the issue.