RTC (LSE) Running very slow

[gkg]

We are using STM32G030's internal RTC with LSE. The bypass capacitors we have used as shown in the schematic is 22pf (assuming 1.5pf stray capacitance). The crystal we used has Load Capacitance is 12.5pf. This resulted in the RTC being slow, 1 min per day.

We also tried with 17pf & 10pf the clock was still slow.

When we remove the load capacitors the RTC becomes fast.

So we used HAL_RTCEx_SetSmoothCalib function, which improved the results (2 seconds slow) when we tested at our lab. But when we send it to the field the RTC time again becomes slower by around 20sec per day.

Anything else can we do to improve the results?

[Richard Li]

Crystal is temperature sensitive parts, you said "field", what's the temperature?

Attached two documents for your reference. 

[STOne-32]

Dear @gkg ,

From

 software point of view : what is the LSE drive level used ? And also if you provide the layout 

Ciao

STOne-32

[gkg]

Hi, 

Without soldering any load capacitors, we tried with both low level and medium high the RTC still is fast. 

Attaching the layout.

 

 

[waclawek.jan]

Point of layout is, that the return from capacitors must go directly to the ground pin which is closest to the crystal pins. There must be no shared path with any other grounds. AN2867 illustrates this, read it carefully.

JW

[gkg]

Yes, hence we have used a ferrite bead to separate the crystal ground from the main ground (as shown in the schematic)

[waclawek.jan]

I don't see where that separated ground is connected to the processor's VSS pin.

JW

[gkg]

Hi,

The VSS connection is from the other side of the PCB.

 

 

[waclawek.jan]

As I've said: you need to return the capacitors directly and through a path as short as possible, avoiding sharing that path with any other circuitry.

You can't have the ferrite bead in that path.

JW

[gkg]

Ferrite Bead seems to have worked well for the other PCBs we have designed so far over the years. This time we have change the controller and consequently the layout. As far as this layout goes is there anything else we can do ?

 

Thanks

[waclawek.jan]

I would try to remove FB, and connect the copper area from using a wire directly to the VSS pin on the STM32 (is it pin 5?) or to some via or other ground connection which is very close to that pin.

JW

[STOne-32]

Dear @gkg ,

is that possible to know your programmer software drive level of the LSE , I do recommmend to use the High drive mode and also to check using another crystal with CL=12,5pF not the same brand . I see on your PCB the size is not very important and the MCU is smaller than the Crystal and caps , so it should work using same footprint . It is really very key to have a balanced CL1 and CL2 in range of 18 to 20pF to have good pullability ( PPMs).

Regards,

STOne-32

[gkg]

Sure, let me try this with 17pf capacitor and a different crystal. ok?

Although, I don't think the crystal is the problem, its more to do with the layout I guess....

 

Nevertheless, let me try this too...

[waclawek.jan]

Show (post photo detailed enough to see the exact return path).

JW