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Visitor II
February 9, 2012
Question

SDIO and SD fat access example?

  • February 9, 2012
  • 82 replies
  • 16079 views
Posted on February 09, 2012 at 01:06

Hi Chaps,

Going slowly mad trying to get Chan Fat working with the sdio libs on a stm32f4.

I'm using the most recent (1.0.0) library for the F4, and the low level access demo within that library builds and (at least appears to ) work OK. 

I've spent many, many hours attempting to patch in 0.9 version of fatfs from chan (thks chan, you're a hero) - but I can't get it to work.

If possible, I'd really really appreciate a demo project/source (or direction to - though I've scoured the web and can't find anything that works!)

I'll post separately about the current problems I'm having with the my current build, but a working example would sort it.

Many thanks,

nat.

#hse-sdio-stm32 #stm32-fat-chanfat-fatfs-sdio #sdcard-stm32f4-sdio-fatfs #sdcard-stm32f4-sdio-fatfs
    This topic has been closed for replies.

    82 replies

    Graduate II
    March 27, 2013
    Posted on March 27, 2013 at 17:04

    8GB SDXC (Class 10, Ultra 1)

    50 KB block read/write, non contiguous regions, with SD_ReadMultiBlocks & WriteMultiBlocks

    51200 Bytes, 562059 Cycles

    10.931237 MBps Read

    51200 Bytes, 752601 Cycles

    8.163688 MBps Write

    51200 Bytes, 444775 Cycles

    13.813726 MBps Read

    51200 Bytes, 701289 Cycles

    8.761010 MBps Write

    51200 Bytes, 444803 Cycles

    13.812856 MBps Read

    51200 Bytes, 702461 Cycles

    8.746393 MBps Write

    51200 Bytes, 445019 Cycles

    13.806152 MBps Read

    51200 Bytes, 704563 Cycles

    8.720299 MBps Write

    51200 Bytes, 445047 Cycles

    13.805283 MBps Read

    51200 Bytes, 3691509 Cycles

    1.664360 MBps Write

    20 MB linear write in 4KB blocks with FATFS (These seem a tad high, will need to do some more analysis)

    20480000 Bytes, 65363911 Cycles

    37.598729 MBps Write (FatFs)

    20480000 Bytes, 58578512 Cycles

    41.953951 MBps Write (FatFs)

    20480000 Bytes, 78068204 Cycles

    31.480166 MBps Write (FatFs)

    20480000 Bytes, 61597732 Cycles

    39.897573 MBps Write (FatFs)

    20480000 Bytes, 74588402 Cycles

    32.948822 MBps Write (FatFs)

    500 KB linear write in 512 byte blocks with FATFS

    512000 Bytes, 150580273 Cycles

    0.408022 MBps Write (FatFs)

    512000 Bytes, 153377418 Cycles

    0.400580 MBps Write (FatFs)

    512000 Bytes, 152458762 Cycles

    0.402994 MBps Write (FatFs)

    512000 Bytes, 153580688 Cycles

    0.400050 MBps Write (FatFs)

    512000 Bytes, 152551330 Cycles

    0.402750 MBps Write (FatFs)

    Visitor II
    March 27, 2013
    Posted on March 27, 2013 at 21:41

    Hi, can you post a link to your test project? Is very interesting transfer rate (MB == MegaByte ??).

    I have made a test to write linear blocks in DMA without FileSystem and in 1s I can only write 160/180 KBytes. With a scope and one GPIO I have measured the time of SD_WaitWriteOperation

    1.
    GPIO_WriteBit(GPIOG, GPIO_Pin_1, Bit_SET);
    2.
    Status = SD_WaitWriteOperation(); 
    // Check if the Transfer is finished
    3.
    GPIO_WriteBit(GPIOG, GPIO_Pin_1, Bit_RESET);

    and I have find thath this is the bottle neck, 1.25ms, too much I think. I have verify the SDIO clock is at 24MHz, card is 4GB Class 10 Ultra (30MB/S in reading from manufacure info), is inpossible my evaluation board can't write more then 130K ! Some people on the forum say that they write at 8/9 MByte per second. Any idea?
    Graduate II
    March 27, 2013
    Posted on March 27, 2013 at 22:42

    After revisiting the 8GB SDHC/XC card and fixing some DMA Completion and Interrupt issues.

    Raw Read/Write

    51200 Bytes, 597976 Cycles

    10.274660 MBps Read

    51200 Bytes, 1605269 Cycles

    3.827396 MBps Write

    51200 Bytes, 566017 Cycles

    10.854798 MBps Read

    51200 Bytes, 1526177 Cycles

    4.025745 MBps Write

    51200 Bytes, 568901 Cycles

    10.799770 MBps Read

    51200 Bytes, 1528307 Cycles

    4.020135 MBps Write

    51200 Bytes, 566817 Cycles

    10.839477 MBps Read

    51200 Bytes, 1912465 Cycles

    3.212608 MBps Write

    51200 Bytes, 685941 Cycles

    8.957039 MBps Read

    51200 Bytes, 5843669 Cycles

    1.051394 MBps Write

    10MB at 4K w/FATFS

    CRC32 213CAAC7 Memory Image

    10240000 Bytes, 412131978 Cycles

    2.981569 MBps Write (FatFs)

    CRC32 213CAAC7 COUNTER.TXT

    10240000 Bytes, 413281981 Cycles

    2.973273 MBps Write (FatFs)

    CRC32 213CAAC7 COUNTER.TXT

    500KB at 512 w/FATFS

    CRC32 B88E65CC Memory Image

    512000 Bytes, 164962825 Cycles

    0.372448 MBps Write (FatFs)

    CRC32 B88E65CC COUNTER.TXT

    512000 Bytes, 165551795 Cycles

    0.371123 MBps Write (FatFs)

    CRC32 B88E65CC COUNTER.TXT

    I added some code to actually validate the data written, so READ and WRITE paths are definitely working.

    I originally ported the STM3240G-EVAL code to the STM32F4-Discovery board. In terms of speed you might want to check the clocks, especially the SDIO clock, and the HSE which is 8 MHz on the Discovery vs 25 MHz on the EVAL.

    These benchmarks were done of an STM32F2 @ 120 MHz with a 48 MHz SDIO clock source, externally it's probably 24 MHz.

    The ''Cycles'' here are ticks of the 120 MHz clock. (1MBps represents 1,000,000 bytes in one second)

    Visitor II
    March 27, 2013
    Posted on March 27, 2013 at 22:50

    Can you attach your code to the post ?

    best regards

    Graduate II
    March 27, 2013
    Posted on March 27, 2013 at 22:55

    Can you attach your code to the post ?

    Sorry, a bunch of proprietary stuff in there.

    Visitor II
    March 27, 2013
    Posted on March 27, 2013 at 23:07

    I think if the clock on CLK line is 24MHz misured with the scope all is OK, the problem I think is the DMA performance, is right ?

    Graduate II
    March 28, 2013
    Posted on March 28, 2013 at 01:06

    I think DMA should haul data pretty effectively, you might want to review the speed of the AHB/APB buses over which it's transacting. On the SDIO controller side there is a pretty deep FIFO (128 bytes?)

    The card initially comes up at 1-bit / 400 KHz, then should switch to 4-bit / 24 MHz. You could check the divisors there. Clocking the SDIO beyond 48 MHz is also possible, gets you some more bandwidth, but USB won't work. Wouldn't recommend, but overclocking does speed the cards up.

    Doing transactions of 512 will always kill you. The cards and the setup efficiencies work better with larger blocks, 4KB to 32KB being sweeter, but ideally at least a cluster, better still if it matches the block/boundaries of the underlying flash devices.

    The benchmark for your 512 byte test don't surprise me, try doing at least 4KB writes.

    Having a simple read cache, with write through, I think would make quite a difference, although I don't have time to invest in one. I have a better FAT implementation, which caches structures internally, but it's a bit of a hog for the STM32.

    The speed limitation for write tends to be one the cards internal controller dictates.
    Visitor II
    March 28, 2013
    Posted on March 28, 2013 at 19:21

    After setting correctly the clock of APB2 and fixed some initialization issues, now I can write MicroSD at 7.2MB/s with FATFS!!! Incredibly fast! Next step is to try in bypass mode... someone has experience ?

    Visitor II
    October 23, 2017
    Posted on October 23, 2017 at 12:08

    Hi,

    Can you tell me how do you measure the writing speed to ur sd card???

    Thanks & Regards

    Sameena Shaikh

    Visitor II
    March 30, 2013
    Posted on March 30, 2013 at 21:09

    In the FATFS-DBG example code, stm32f4_discovery.c

    Function SD_LowLevel_DMA_TxConfig() This line:

     SDDMA_InitStructure.DMA_BufferSize = 0;

    causes an assert to be thrown when calling:

    DMA_Init(SD_SDIO_DMA_STREAM, &SDDMA_InitStructure);

    -Bill
    Graduate II
    March 30, 2013
    Posted on March 30, 2013 at 21:58

    Noted