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Graduate
June 10, 2025
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selecting microcontroller for custom high speed data operation.

  • June 10, 2025
  • 4 replies
  • 1248 views

Hi All,

We are currently exploring microcontroller options to meet our system requirements. The system must support Ethernet communication at 1Gbps while simultaneously driving 24 GPIOs (12+12) with a single clock output at a speed of 38 MHz. All GPIOs should be updated on the rising edge of the clock signal and must be refreshed within half of the high duration of the clock signal, approximately 6ns.

Additionally, the system requires high-speed external RAM to process data of approximately 1GB data. We have evaluated the GPIOs driving mechanism on one microcontroller, we encountered a bottleneck with the DMA clock source, as few clock cycles are required for proper DMA processing and updated GPIOs status by timer trigger event.

We are seeking a microcontroller that meets these specifications and provides an efficient solution.

Any suggestions will be appreciated.

Thank you in advance.

Jaydeep.

    This topic has been closed for replies.
    Best answer by unsigned_char_array

    @JaydeepRathod wrote:

    I am not working on the motor controller. It is the "printhead" control mechanism which has the custom protocol for the interfacing. Also the data rate at which the printhead needs to be feed is very high. 


     What protocol? Maybe driver chips exist that can drive this printhead. Then the MPU can just send data to the driver chip. Or combine an FPGA with a MPU. Many FPGAs have a build-in MCU or MPU.You can let the FPGA do the timing critical stuff and write the control logic in software.

    4 replies

    Graduate
    June 10, 2025

    Merged - moved from MPUs forum.


    Hi All,

    We are currently exploring microcontroller options to meet our system requirements. The system must support Ethernet communication at 1Gbps while simultaneously driving 24 GPIOs (12+12) with a single clock output at a speed of 38 MHz. All GPIOs should be updated on the rising edge of the clock signal and must be refreshed within half of the high duration of the clock signal, approximately 6ns.

    Additionally, the system requires high-speed external RAM to process data of approximately 1GB data. We have evaluated the GPIOs driving mechanism on one microcontroller, we encountered a bottleneck with the DMA clock source, as few clock cycles are required for proper DMA processing and updated GPIOs status by timer trigger event.

    We are seeking a microcontroller that meets these specifications and provides an efficient solution.

    Any suggestions will be appreciated.

    Thank you in advance.

    Jaydeep.

    Super User
    June 10, 2025

    @JaydeepRathod wrote:

    We are currently exploring microcontroller (sic?) options.


    But you've posted in the micro-processor forum ?

    Is that what you intended?

    You can review the STM32 MPU family here, and sort by your required criteria:

    https://www.st.com/en/microcontrollers-microprocessors/stm32-arm-cortex-mpus/products.html

    Graduate
    June 10, 2025

    Duplicate - merged.


    Hi All,

    We are currently exploring microcontroller options to meet our system requirements. The system must support Ethernet communication at 1Gbps while simultaneously driving 24 GPIOs (12+12) with a single clock output at a speed of 38 MHz. All GPIOs should be updated on the rising edge of the clock signal and must be refreshed within half of the high duration of the clock signal, approximately 6ns.

    Additionally, the system requires high-speed external RAM to process data of approximately 1GB data. We have evaluated the GPIOs driving mechanism on one microcontroller, we encountered a bottleneck with the DMA clock source, as few clock cycles are required for proper DMA processing and updated GPIOs status by timer trigger event.

    We are seeking a microcontroller that meets these specifications and provides an efficient solution.

    Any suggestions will be appreciated.

    Thank you in advance.

    Jaydeep.

    Super User
    June 10, 2025

    > simultaneously driving 24 GPIOs (12+12) with a single clock output at a speed of 38 MHz.

    No STM32 MCU will be able to do this.

    Graduate II
    June 10, 2025

     >the system requires high-speed external RAM to process data of approximately 1GB data.

    I would say all external RAMs ive seen around for signal processing type microcontrolers (FMC peripheral ) are in the MB range.

    >approximately 6ns.
    You are describing FPGA style stuff

    are you planning to do a 2 level motor controler/three phase static inverter with some ugly bitbanged PWM? 

    Graduate
    June 11, 2025

    Hi @Javier1 

    Thanks for the reply.

    are you planning to do a 2 level motor controler/three phase static inverter with some ugly bitbanged PWM?

    I am not working on the motor controller. It is the "printhead" control mechanism which has the custom protocol for the interfacing. Also the data rate at which the printhead needs to be feed is very high. 


    >approximately 6ns.
    You are describing FPGA style stuff

    We are exploring weather the high-end MCUs are capable to do so rather then using FPGA?

    We believed the MCU like STM32H7 would be able to do so and we have tried to do the simple frequency generation using Timer1 and data output to GPIO using DMA(Triggered through timer up event) and using D2 domain memory. We found that the DMA takes ~10ns to copy the data from memory to GPIO.

    BTW, thanks for the suggestion.

    Jaydeep

    Super User
    June 10, 2025

    As @Javier1 said, if you want a 6ns cycle, this is a job for an fpga.