SPI NSS cannot be switched in software mode

[Thoufiel]

I am trying to use SPI communication with the STM32H562 (for FPGA programming purposes).

 

The reference manual states that if SPI_CFG2's SSM = 1, the NSS can be toggled High/Low by switching the SSI bit in SPI_CR1.

However, the switching of SSI is not reflected in the oscilloscope observations.

Additionally, I tried setting the NSS port as GPIO instead of SPI communication and using HAL_WritePin to configure it, but this was also not reflected.

When using the NSS port for SPI, should I set the start register bits such as SPE and CSTART?

[Andrew Neil]

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@Thoufiel wrote:

The reference manual states that if SPI_CFG2's SSM = 1, the NSS can be toggled High/Low by switching the SSI bit in SPI_CR1.

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No, that's not what it says:

 

 

 

 

 

[Thoufiel]

Thank you for your reply.

 

I had read that section before my initial question, and regarding the content just before the red line,

I understood it as "Slave select can be performed by setting the SSI bit."

What does "internally" mean in this context?

[Andrew Neil]

I guess it means something internal (so, your software?) has to do it by manipulating the SSI bit ?

Perhaps @STTwo-32 could clarify ?

[TDK]

In an SPI master, you can either use the NSS pin as SPI hardware-controlled, or you can configure it as GPIO.

If a slave, it should be hardware controlled.

> Additionally, I tried setting the NSS port as GPIO instead of SPI communication and using HAL_WritePin to configure it, but this was also not reflected.

Show relevant code and hardware setup. Controlling the pin as GPIO should be relatively simple exercise.

> When using the NSS port for SPI, should I set the start register bits such as SPE and CSTART?

Yes. The peripheral needs to be enabled in order for it to do anything.