STM32 Muxed FMC reference schematic

[gosal]

Hi,

I'm working on a hardware design using the STM32F765VIH and I am trying to connect a MT28EW128ABA1HPC-0SIT NOR Flash and IS66WVH16M8DBLL-100B1LI PSRAM to the FMC in muxed mode. I'm struggling to understand how the muxed connection should be made and although I've searched a lot I cannot seem to find any reference schematics for this. 

 

Can anyone point me to reference material that could help me?

 

Thanks,

George

 

Edit: Corrected NOR Flash part number, was previously wrongly written as part IS29GL128-70DLEB

[waclawek.jan]

What exactly do you mean by "muxed mode" here?

The PSRAM appears to be HyperBus interfaced; FMC does not support HyperBus. The 'F7 family does not have OCTOSPI interface which supports HyperBus, read AN5050.

JW

[mƎALLEm]

Hello,

Not sure how do you plan to connect a HyperRAM to the FMC interface! The protocol is quiet different!

Regarding the NOR Flash, FMC muxed mode needs either a memory having natively a shared Address-Data lines (which is not the case of IS29GL128-70) or you need to add external latches to hold the address during the read/write operations.

[gosal]

Sorry I had specified the wrong part number for the NOR Flash, I'm considering the MT28EW128ABA1HPC-0SIT but regardless of the actual partnumbers is there any reference design that shows how to interface the muxed FMC to standard parallel NOR Flash or PSRAM ?

[mƎALLEm]

Hello,

MT28EW128ABA1HPC: same thing -> No muxed Address-Data busses:

Unfortunately (to my knowledge) there is no reference design provided by ST as all STM32 MCU boards are using memories having separated Address/Data lines: direct connections data-data, address-address (no shared busses / neither external latches).