STM32C0 SO8N bootloader: I2C and SWD

[lukasl]

Hello,

which interfaces does a virgin STM32C0 in SO8N offer on the first boot for programming? AN2606 says USART1 and I2C1. In other cases, AN2606 adds a note when SWD does not work, but no such note is there for STM32C0. So, I assume SWD is supported too. However, while SWD is on PA13 and PA14 and I2C1 is on PB6 and PB7, PA14 and PB6 is muxed to the same pin in the SO8N package. So, this seems like a conflict. Did I understand something wrong?

If SWD is not supported in the bootloader, is there a way to prevent the bootloader (for example, with the BOOT0 pin)? I want to put SWD on a pin header for debugging anyway and it would be annoying to need extra pins just for the initial programming.

[TDK]

SWD is always supported, but it's not part of the bootloader. SWD support is part of the Cortex core itself, not something that is programmed into code like the bootloader functions.

You should always be able to connect under reset to avoid pins being assigned other functions. But even if not, I2C pins are in input mode. No real conflict with PB6/PA14 as the I2C pins are in input mode until the address is sent. If you're using SWD, the address is never sent and the pin will stay high impedance.

> In other cases, AN2606 adds a note when SWD does not work, but no such note is there for STM32C0.

The note is present in cases when PA14 is reassigned to a different function other than SWD. In the case of the STM32C0, PA14/PA15 are not used by the bootloader. They are connected to other pins, but those pins are high impedance so no conflict.

[lukasl]

I wondered how PB6 and PA14 can both be active when SECURE_MUXING_EN is enabled (which is the default), but secure muxing just enforces that either PB6 and PA14 can be an output. Still, both pins are input. PA14 is SWCLK, which is input-only for SWD on the STM32C0. This explains why it should work.