STM32F072RB SPI DMA issue

[Sudharshan]

Hi Team,

We are using STM32F072RB MCU with discover EVM board

We are using STM32CubeIDE

We are using SPI1 and SPI2 as slave mode configuration 

Query: 

we observed that the FIFO full and overflow is happening @Spi slave while receiving the data stream @1Mbps of 64byte frames and packets are corrupting and not receiving properly. And when we configured SPI1 in DMA mode in IDE, observed that channel2 is configured, but frames are  not received. Pl provide inputs in this regard.

Team Expecting your reply asap

[waclawek.jan]

> we observed that the FIFO full and overflow is happening

If you don't use circular FIFO, then it's the end-of-transfer DMA interrupt's processing, and time to start next DMA transfer, which is too slow.

There are no magic solutions there, you just have to write code more tightly, and depending on what you do with the data, there may be no solution at all. Overhead in interrupt processing due to Cube/HAL usage is a drawback here, too.

JW

[Sudharshan]

Hi waclawek,

Thanks for the response

Can we have either yours or any technical representative contact mailid to conduct a session to ask some questions and clarify the doubts regarding STM32F072RB so that it will be helpfull to us