STM32F407 VDDA-VREF+ difference

[waclawek.jan]

In the STM32F407 DS, ADC characteristics table has the following footnotes:

IMO 2. follows from 3. (which is a more stringent requirement); thus 2. is redundant and confusing.

JW

[mƎALLEm]

Hello,

This will be escalated internally for analysis and fix. Internal ticket number: 211812.

Thank you.

[mƎALLEm]

Hello,

Note 2, is related to the power-up phase while note 3 is related to the functional mode when the ADC is running.

So note 2 will be updated to mention that difference.

The proposed change:

2. When VDDA and VREF+ are supplied by independent voltage sources, during power-up phase, it is recommended to maintain the difference between VDDA and VREF+ below 1.8V.

[waclawek.jan]

Thanks for the clarification.

JW