STM32F413 Timer1 Counter4 Documentation Misinformation

[HTechSTMGuy]

Hi All,

I am using a STM32F413VGT, with a PWM input signal into Timer1. I am actually using all the counters for the same purpose, and Counter 1-3 work as expected setting the input capture to "non-inverted/both-edge".
The documentation for this micro - "rm0430-stm32f413423-advanced-armbased-32bit-mcus-stmicroelectronics.pdf" details that the second bit required for channel 4, CC4NP in the CCER register, for setting Capture/Compare channel 4 to "non-inverted/both-edge" is reserved.
When looking at the standard peripheral library, and MXCube, both indicate that I can set that bit to use channel 4 of Timer 1 for "non-inverted/both-edge" input capture.

Am I missing an errata? or is the documentation out of date? Is there any guarantee that all STM32F413vgt chips I buy will work the same if the documentation specifies that bit should "remain at reset value"?

 

Thanks,

[waclawek.jan]

It's most probably a documentation error.

It used to be also in the "mainstream" RM0090 until rev.18, it has been fixed in rev.19 dated 25.Feb.2021.

As the lower-end 'F4s including 'F413 are not much in the spotlight, their RM get less attention and are not updated that often. Yes, I know RM0430 has been updated a month ago, but ST is not very good in propagating fixes like this into all relevant RMs...

Btw. in an STM32 timer there are no multiple *counters*; those are capture-compare *channels*.

JW

 

[HTechSTMGuy]

Thank you,
I have updated the question to be more accurate if anyone were to stumble onto this in future.

[Sarra.S]

Hello @HTechSTMGuy, welcome to ST Community,

I can confirm that this is a documentation error that was propagated in several reference manuals (RM0430 - RM0090 - RM0383). 

I've reported this internally to be propagated for relevant RMs ( Internal Ticket 196921).