stm32f746 ETHERNET issue

[clock.1166]

Hi,

Could anyone help with this problem? Its driving me mad!!!

I have designed an ethernet interface  for an F746-100 MCU

I have changed pins to avoid using Port G and I have used the  circuit below.

The RJ45 connector is a standard RB1-125BAG1A and the ethernet chip is a LAN8742A

Can anyone tell me if there are any mistakes in this?

I cannot get any connection at all - F746-100 will not ping.

Green LED ON and Yellow LED flashes continuously.

I have an STM32F746 - 144 Nucleo with the same software (apart from the two pins that are changed) -works fine.

The 25MHz xtal works OK (same signal on both boards) and the LAN8742_STATUS_OK returns 0  on both boards when I debug.

There appears to be no errors in the setup LAN8742.c or the ethernetif.c when I debug. This code works OK on the NUCLEO board and I can display a small webpage. Both sets of code use only ETH and LWIP, fixed IP, on a standard Cubeide setup. I assume that the only difference is the two GPIO allocations (PG13>PB12 and PG11>PB11) which I have altered in software.

I have the same sort of signals on both boards on TXP/TXN/RXP/RXN

Can some kind soul tell me if there is anything obviously wrong with my hardware?

Thanks.

Chris

[STOne-32]

Hi @clock.1166 ,

 

Here are few hypothesis :

• Check the clocks of the PHY and also the signals going to the LQFP100 leads ( I have seen in the past some surprises)
• re-check if PB11 and PB12 are not reconfigured somehow in Software to other functions than Ethernet . It is strange that a debug all is working from you side .
• may be a signal integrity matter  if all TX signals are coming correctly to the PHY with the Ref Clock , may be to check the driving level of these I/O setting by software- I/O speed .

Hope it helps you .

Cheers,

STOne-32

[clock.1166]

Thanks for your help STOne, but I have checked the software and I cant find anything amiss. The clock (25Mhz) and reference (50Mhz) are identical to the NUCLEO F746, and so are the TXP/TXN/RXP/RXN as far as I can ascertain.

I've tried running the board at a lower main clock speed, but how do you set the I/O speed as you've mentioned?

I just wish there was a simple ETH+LWIP project around for an F746 LQFP-100. I haven't managed to find one.

I also cannot understand what the flashing yellow LED means - any ideas?

I am not an expert in high frequency design and I am struggling!

Chris

[STOne-32]

Setting I/O speed is done when the port B is configured to Alternate function and should be in Output speed parameter if you can share your Ports settings versus Our LQFP144 Nucleo code software . 

Let us know,

STOne-32

[clock.1166]

One interesting thing: If I completely erase the STM32F746-100, the Leds act in exactly the same fashion when the port is connected to the router.

Green LED ON and Yellow LED flashes continuously.

Can I deduce anything from that?

Thanks.

Chris

[STOne-32]

May be to double check the PHY configuration and signals on the  PCB to the RJ45 Connector. Not sure what is the cause here .  @STea  your help is appreciated ;)

ciao

STOne-32

[STea]

Hello @clock.1166 ,

Implementing the Ethernet on custom board can be a challenging task and i will try to help you to get over this problem .

first i need some clarification with previous conversation with @STOne-32 . 

1. "The 25MHz xtal works OK (same signal on both boards) and the LAN8742_STATUS_OK returns 0  on both boards when I debug." how did you make sure that the Xtal 25 Mhz is outputting the same signal on both boards i ask you this because issue with the precision of the clock source can lead the application to malfunction.and the jitter can affect the Ethernet periph behavior.
2.  is the gpio speed for all the assigned pins is put to very high this is also the recommended setting for the Ethernet ?

adding on that i have to ask you some further questions to verify the root cause of this problem:

1. verify if there is a change in the VDD level between the two boards .
2. check if you can visualize the signals from the TXD0 and TXD1 to see if there is traffic between the MCU and the LAN8742A
3. try to read the status of  LAN8742A with the help of the init function api in LAN8742.c in run mode (toggle an LED when LAN8742_STATUS_OK returns 0 )
4. the RST pin in your design seems to be not connected can you give more info on it its not clear in the picture 
5. can you give us information about the clock source feed to the MCU .

hope you will get back to me with some good news or helpful information to get it working soon.

BR

[clock.1166]

Thanks STea/Stone-32,

I have placed (I hope) a better image of my circuit. Any suggestions would be helpful!

I have a feeling that this is the source of all my problems, although I dont know enough about LWIP and ETH to be certain.

I cannot find any similar project using STM32F746-100. It would be helpful if I could.

 

1. I compared the clocks from an STM32F746 nucleo (which works fine with the same basic software) to my board with a scope. The reference clock(50Mhz) and the xtal clock (25Mhz) looked almost exactly the same - 25.010 and 25.1 MHz - same amplitude. The signals on TXP/TXN/RXP/RXN also  look the same.

2. Yes -  GPIO's set to very high.

Simple webserver for Nucleo F746 generated from cube IDE attached (http://192.168.1.218/)

F746-100 generated same way - obviously ETH pins are slightly different.

I will work on the other questions today.

Thanks.

[LCE]

25.1 MHz - that on the board that is not working?

50 MHz clock is generated by the PHY?

After your GPIO switch - checked all the alternate function numbers?

PCB layout: around the crystal and clocks all clean? No crazy routing of the high speed signals?

PHY: Read all the registers and check / compare to datasheet.

[clock.1166]

Possibly slightly better image?

[clock.1166]

Hi STea,

Answers to your questions:

1. verify if there is a change in the VDD level between the two boards . ** NUC VDD 3.3V    F746-100 3.27V
   
2. check if you can visualize the signals from the TXD0 and TXD1 to see if there is traffic between the MCU and the LAN8742A ** Scope shows no signals on either, but there are signals on TD_P/N and RD_P/N
   
3. try to read the status of  LAN8742A with the help of the init function api in LAN8742.c in run mode (toggle an LED when LAN8742_STATUS_OK returns 0 ) ** Always returns 0 -OK
   
4. the RST pin in your design seems to be not connected can you give more info on it its not clear in the   picture ** ** Connected to 47K to VDD and 100nF to ground and MCU NRST pin. N/O switch to ground.
   
5. can you give us information about the clock source feed to the MCU . **Looks fine - 50MHz 4V peak to peak sinewave.
   

Thanks again.

[Iyesi.1]

 

Hello clock.1166,

 

I have a problem with custom design LAN8742 ic circuit. What is the problem for that there is no signal on the TXD0/TXD1/TXEN pins? There are signals on RXD0/RXD1 and RXN-P, TXN-P pins by the way.

[clock.1166]

Hi - The circuit that I posted works perfectly.

My problem was that the 49.9ohm resistors were incorrect values. After I had changed these - all was OK.

Chris

[LCE]

Let's hope the 50 MHz is a sine wave on your scope only due to bad probe / setup / scope.  ;)

I recommend not only checking the PHY register values by a HAL function's return value, check the PHY's register contents, and things like auto negotiation completed, 100M / 10M, full / half duplex.

[clock.1166]

Hi LCE,

The 50Mhz is referred to in sect 3.7.4 of LAN8742A spec.

 

'When configured for REF_CLK Out Mode, the device generates the 50 MHz RMII REF_CLK and the nINT interrupt is not available. REF_CLK Out Mode allows a low-cost 25 MHz crystal to be used as the reference for REF_CLK'.

I'm coming to the conclusion that my problems may be due to the relatively long test points on the 8742A chip and this may be causing reflections on the PCB?

I will check the things you have mentioned.

Thanks,

Chris