Solved
STM32G0B1 EXTI DMA GPIO
Hello dear All,
On STM32G0B1 I'm trying to capture PORTD[0-7] value with DMA on EXTI0 event (PD0 falling edge)
(Read PORTD value in EXTI0 interrupt is too slow for this application -> PORTD change value before entering IRQHandler())
I configure EXTI and DMA2_Ch3 in MX but PORTD value is NOT trasfered in my destination variable on event.
However, by using HAL_DMA_Start_IT(), function DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX1_OVR_IRQHandler() is called.
Could you please help me to do a well configuration in order to transfert PORTD->IRD value in my destination variable "u8_tst_1" with DMA on PD0 falling edge event ? :|
Let see source code below.
My Environment:
STM32CubeIDE v1.8.0
STM32CubeMX v6.4.0-RC4
STM32Cube_FW_G0_V1.5.0
NUCLEO-G0B1RE
Windows 10 Pro 21H2
/* Private variables ---------------------------------------------------------*/
DMA_HandleTypeDef hdma_dma_generator0;
/* USER CODE BEGIN PV */
volatile uint8_t u8_tst_1;
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
static void MX_GPIO_Init(void);
static void MX_DMA_Init(void);
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
/**
* @brief The application entry point.
* @retval int
*/
int main(void)
{
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
MX_DMA_Init();
/* USER CODE BEGIN 2 */
HAL_DMAEx_EnableMuxRequestGenerator(&hdma_dma_generator0);
HAL_DMA_Start_IT(&hdma_dma_generator0, (uint32_t)&GPIOD->IDR, (uint32_t)&u8_tst_1, 1);
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1)
{
/* USER CODE END WHILE */
/* USER CODE BEGIN 3 */
}
/* USER CODE END 3 */
}
/**
* Enable DMA controller clock
* Configure DMA for memory to memory transfers
* hdma_dma_generator0
*/
static void MX_DMA_Init(void)
{
/* Local variables */
HAL_DMA_MuxRequestGeneratorConfigTypeDef pRequestGeneratorConfig = {0};
/* DMA controller clock enable */
__HAL_RCC_DMA2_CLK_ENABLE();
/* Configure DMA request hdma_dma_generator0 on DMA2_Channel3 */
hdma_dma_generator0.Instance = DMA2_Channel3;
hdma_dma_generator0.Init.Request = DMA_REQUEST_GENERATOR0;
hdma_dma_generator0.Init.Direction = DMA_PERIPH_TO_MEMORY;
hdma_dma_generator0.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_dma_generator0.Init.MemInc = DMA_MINC_DISABLE;
hdma_dma_generator0.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
hdma_dma_generator0.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
hdma_dma_generator0.Init.Mode = DMA_NORMAL;
hdma_dma_generator0.Init.Priority = DMA_PRIORITY_VERY_HIGH;
if (HAL_DMA_Init(&hdma_dma_generator0) != HAL_OK)
{
Error_Handler( );
}
/* Configure the DMAMUX request generator for the selected DMA channel */
pRequestGeneratorConfig.SignalID = HAL_DMAMUX1_REQ_GEN_EXTI0;
pRequestGeneratorConfig.Polarity = HAL_DMAMUX_REQ_GEN_FALLING;
pRequestGeneratorConfig.RequestNumber = 1;
if (HAL_DMAEx_ConfigMuxRequestGenerator(&hdma_dma_generator0, &pRequestGeneratorConfig) != HAL_OK)
{
Error_Handler( );
}
/* DMA interrupt init */
/* DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX1_OVR_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX1_OVR_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX1_OVR_IRQn);
}
/**
* @brief GPIO Initialization Function
* @param None
* @retval None
*/
static void MX_GPIO_Init(void)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOD_CLK_ENABLE();
/*Configure GPIO pin : CLK_L1_Pin */ // <- PD0
GPIO_InitStruct.Pin = CLK_L1_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING;
GPIO_InitStruct.Pull = GPIO_PULLUP;
HAL_GPIO_Init(CLK_L1_GPIO_Port, &GPIO_InitStruct);
}
/**
* @brief This function handles DMA1 Ch4 to Ch7, DMA2 Ch1 to Ch5 and DMAMUX1 Overrun Interrupts.
*/
void DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX1_OVR_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX1_OVR_IRQn 0 */
/* USER CODE END DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX1_OVR_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_dma_generator0);
// Handle DMAMUX
// Handle DMA2_Channel3
HAL_DMAEx_MUX_IRQHandler(&hdma_dma_generator0);
/* USER CODE BEGIN DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX1_OVR_IRQn 1 */
/* USER CODE END DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX1_OVR_IRQn 1 */
}