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Visitor II
February 29, 2024
Solved

STM32G473VC

  • February 29, 2024
  • 1 reply
  • 886 views

Hello,

I will use stm32g473VC ADC2 working together with DMA.

I configure ADC2, Input3 at Pin PA6 

and DMA2 Channel1 to read 100 Samples from ADC after Start.

At first call after cpu reset I receive the expected result:

ADC:Value 4034 for Items 0->99, as you can see in following output. (what is a correct value)

Item0: 4034
Item1: 4034
Item2: 4034
Item3: 4036
Item98: 4034
Item99: 403
4

But at the 2nd and following  starts of DMA, the first received value is 0.

Item0: 0
Item1: 4035
Item2: 4035
Item3: 4035
Item98: 4035
Item99: 4035

At every start I call the following functions:

LL_ADC_ClearFlag_EOC(ADC2);
LL_ADC_ClearFlag_EOS(ADC2);
LL_ADC_ClearFlag_EOSMP(ADC2);
LL_ADC_ClearFlag_OVR(ADC2);

LL_DMA_SetDataLength(DMA2, LL_DMA_CHANNEL_1, 100U);

LL_ADC_REG_StartConversion(ADC2);
LL_DMA_EnableChannel(DMA2, LL_DMA_CHANNEL_1);

while (LL_DMA_GetDataLength(DMA2, LL_DMA_CHANNEL_1) > 0U)
{
}
LL_ADC_REG_StopConversion(ADC2);
LL_DMA_DisableChannel(DMA2, LL_DMA_CHANNEL_1);

Comparing ADC2 and DMA registers at first and 2nd call.

FirstCall:

ADC2->ISR: 0x1
ADC2->IER: 0x0
ADC2->CR: 0x10000001
ADC2->CFGR: 0x80003001
ADC2->CFGR2: 0x0
ADC2->SQR1: 0xc0
ADC2->SQR2: 0x0
DMA2_Channel1->CCR: 0x2580
DMA2_Channel1->CPAR: 0x50000140
DMA2_Channel1->CMAR: 0x200003b4

Exactly the same at 2nd and consecutive calls:

ADC2->ISR: 0x1
ADC2->IER: 0x0
ADC2->CR: 0x10000001
ADC2->CFGR: 0x80003001
ADC2->CFGR2: 0x0
ADC2->SQR1: 0xc0
ADC2->SQR2: 0x0
DMA2_Channel1->CCR: 0x2580
DMA2_Channel1->CPAR: 0x50000140
DMA2_Channel1->CMAR: 0x200003b4

 

At startup I do following configurations:

LL_ADC_REG_SetContinuousMode(ADC2, LL_ADC_REG_CONV_CONTINUOUS);
LL_ADC_REG_SetDMATransfer(ADC2, LL_ADC_REG_DMA_TRANSFER_LIMITED);
LL_DMA_SetPeriphRequest(DMA2, LL_DMA_CHANNEL_1, LL_DMAMUX_REQ_ADC2);


LL_DMA_ConfigAddresses(DMA2, LL_DMA_CHANNEL_1, 
LL_ADC_DMA_GetRegAddr(ADC2, LL_ADC_DMA_REG_REGULAR_DATA),
reinterpret_cast<uint32_t>(&ReceiveBuffer[0]),
LL_DMA_DIRECTION_PERIPH_TO_MEMORY);

LL_DMA_SetDataTransferDirection(DMA2, LL_DMA_CHANNEL_1, LL_DMA_DIRECTION_PERIPH_TO_MEMORY);
LL_DMA_SetChannelPriorityLevel(DMA2, LL_DMA_CHANNEL_1, LL_DMA_PRIORITY_HIGH);
LL_DMA_SetMode(DMA2, LL_DMA_CHANNEL_1, LL_DMA_MODE_NORMAL);
LL_DMA_SetPeriphIncMode(DMA2, LL_DMA_CHANNEL_1, LL_DMA_PERIPH_NOINCREMENT);
LL_DMA_SetMemoryIncMode(DMA2, LL_DMA_CHANNEL_1, LL_DMA_MEMORY_INCREMENT);
LL_DMA_SetPeriphSize(DMA2, LL_DMA_CHANNEL_1, LL_DMA_PDATAALIGN_HALFWORD);
LL_DMA_SetMemorySize(DMA2, LL_DMA_CHANNEL_1, LL_DMA_MDATAALIGN_HALFWORD);

 

I have no more idea, what I'm doing wrong.

Maybe you can help me.

Thanks in advance

Best regares johann

    This topic has been closed for replies.
    Best answer by Imen.D

    Hello @jhoerd,

    You should take into consideration several parameters: ADC accuracy, calibration, ADC Sampling Time...

    You need calibration before to start the ADC.

    I advise you follow available ADC-LL example within STM32CubeG4.

    Have a look to the ADC limitations in the errata sheet to check if you have the same conditions.

    PS: Please remove underline text and use the "Insert/Edit Code sample" button to share properly source code.

    ImenD_0-1709226505526.png

    1 reply

    Imen.DAnswer
    Technical Moderator
    February 29, 2024

    Hello @jhoerd,

    You should take into consideration several parameters: ADC accuracy, calibration, ADC Sampling Time...

    You need calibration before to start the ADC.

    I advise you follow available ADC-LL example within STM32CubeG4.

    Have a look to the ADC limitations in the errata sheet to check if you have the same conditions.

    PS: Please remove underline text and use the "Insert/Edit Code sample" button to share properly source code.

    ImenD_0-1709226505526.png