STM32H7 FDCAN FiFo receives wrong values sometimes

[julred]

Dear all,

i have a custom pcb with a STM32H753XIHx.

I want to use CAN1 Interface to receive PDO and SDOs (Baudrate: 125k, CANopen).
My receive routine looks like this:

 

// CAN 1 receive interrupt callback
void HAL_FDCAN_RxFifo0Callback(FDCAN_HandleTypeDef *hfdcan, uint32_t RxFifo0ITs)
{
// static allocation saves instantiation time during interrupt
static struct canMsg *rxmsg = NULL;
static FDCAN_RxHeaderTypeDef rxheader;
char temp = 0;

if(hfdcan == &hfdcan1)
{

 // CAN element available ?
 if ( FREE_EMPTY() == 0 )
 {
 // Element aus freeRx-Puffer holen
 if((rxmsg = FREE_PULL())!= NULL )
{
// retrieve rx message from fifo 
if( HAL_FDCAN_GetRxMessage(hfdcan, FDCAN_RX_FIFO0, &rxheader, (uint8_t*) rxmsg->Data.Values.c ) == HAL_OK )
{

 

 

The received CAN message payload will be stored inside rxmsg->Data.Values.c[].

I send static SDO messages to the pcb:

0x43 0x10 0x20 0x01 0x08 0x00 0x00 0x00

But from time to time, the payload is corrupted (e.g. everything filled with 0x00) like:

0x43 0x10 0x20 0x01 0x00 0x00 0x00 0x00

Please find attached my ioc configuration.

 

Please let me know if i need to optimize something in ioc file to receive can messages completely correct.

 

Thank you very much

 

[mƎALLEm]

Hello and welcome to the community.

You didn't attach the ioc file but just a screenshot of a part of FDCAN peripheral config and I don't think it's helpful.

Could you please share your ioc file?

Are you sure rxmsg->Data.Values.c is not overwritten by something else like DMA for example?

[julred]

Hello,

please find attached the complete project ioc file.

How can I verfiy/proof that rxmsg will not be affected by DMA?

[mƎALLEm]

Hello,

Looking at your ioc file, I don't see issues with neither your clock source of FDCAN nor the FDCAN bitrate config. Meanwhile, I prefer to be sure there is no issue with the sampling of the CAN bit: 

I used this site http://www.bittiming.can-wiki.info/ to fit your needs as you're using CANopen:

Bitrate is 125kb/s and the sample point is selected to be at 87.5 % as indicated.

So the prescaler = 4, SEG1 = 139 and SEG2 = 20.

I prefer to select the lowest prescaler value with highest SEG1/SEG2 values (for a best bit sampling resolution) fitting a given sample point:

Regarding your question about DMA, are you already using it? to verify if rxmsg is affected by DMA, disable CAN reception, set rxmsg to a random value and see if it will change over time. Note that it could be also the CPU itself overwriting your data.