STM32H743 ADC sampling problem

[lea3]

Hi all. I have encountered one ADC sampling problem in STM32H743. When the signal's amplitude is large, the ADC works fine. However, when the signal's amplitude is low, there are many jitters that I don't want. What happens here? How to fix it? Many thanks.

Settings: ADC 12bit, clock PLL2P20MHz, asynchronous clock mode divided by 1, sampling time 2.5 cycles, DMA circular mode，timer 2 trigger.

Timer2 prescaler 1-1, counter period 200-1, clock 200MHz.

Fig.2Fig.1

 

[TDK]

How to optimize the ADC accuracy in the STM32 MCUs - Application note

Getting started with the STM32H7 Series MCU 16-bit ADC - Application note

 

Custom hardware? Ensure VREF+ is decoupled appropriately and stable.

Sampling time of 2.5 cycles is short--don't expect perfect results.

[lea3]

Hi. Many thanks for your response. it is not a custom hardware. I have bought the board from the internet. There are many functions on the board. I have checked the VREF+ on the oscilloscope. It's stable. I have also changed the 2.5 cycles to 32.5 cycles and the clock PLL2P for ADC from 20MHz to 100MHz. Still the same problem for the signal with low amplitude.

[MasterT]

Try:

HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc, uint32_t CalibrationMode, 

According to App. Note max clock for 144-pin package is 12 MHz.

 

[Carl_G]

Do those correspond to your sampling interval? They could be a drop in voltage from taking the sample. This can happen if you are sampling multiple channels and the previous channel happens to be very low. Fundamentally, you might consider this an input impedance issue.

But first, are you sampling multiple channels? What does your circuit look like?