STM32H743VG QSPI in double flash mode for driving external DAC

[JWizard]

I need to make 2 DAC channels 4bit each. I plan to use QSPI in double flash mode.

Task is to play prerecorded samples from RAM cyclically. Samplerate is 45Msamples/second

I plan to use DMA in circular mode to send data from RAM to QSPI

Are there limitations on summary samples count? Because I see data size fields in QSPI  registers

Are there any other limitations for my setup?

[KDJEM.1]

Hello @JWizard and welcome to the community :),

Which QSPI frequency and mode are you using?

Could you please share a QSPI register screenshot?

Please try to decrease the OCTOSPI frequency by increasing the prescaler.

I hope this help you!

Kaouthar

 

 

[JWizard]

I am starting pcb design for project.

I want to be shure that when I choose This microcontroller, it Will work as i want. 

Qspi frequency 45mbit per second

Indirect Mode, no commands, no address, double flash enabled

I other words I want to use it as 8-bit spi.

Questions are:

1. Will Qspi work With circular dma from internal sram to Qspi?

2. Is there a limitation on bytes count? I am asking, because there are some qspi  registers where flash size is mentioned. Will qspi stop sending data when flash size bytes count is reached? 

[Tesla DeLorean]

Ok, so you don't want to use it as FLASH, but rather use the BUS for some secondary use case.

To a FPGA/CPLD perhaps, not sure it's going to sustain continuous activity in a synchronous sense.

Pretty sure the H743 doesn't facilitate a memory-mapped WRITE

Command level to a QSPI NOR FLASH, pages are 256-bytes. I think you can burst write significantly more. But in any case you're not going to be able to stream in a continuous synchronous fashion.

[Tesla DeLorean]

In memory-mapped you could likely feed directly from QSPI. Can also read via commands

Bandwidths do seem rather high, any other things that are going on that might cause contention?

Data for play-back in internal RAM or SDRAM?

DMA has a 16-bit transfer count, so the amount of memory will be dictated by the width being read. Also double-buffer (ping-pong) modes.