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Visitor II
April 8, 2022
Question

STM32H747 QSPI FIFO threshold is 5 bits but only 4 are writable

  • April 8, 2022
  • 1 reply
  • 1180 views

I'm trying to set the QUADSPI FIFO threshold when reading from external flash using interrupts and I want an interrupt to occur when there are 32 valid bytes in the FIFO. I'm setting the QUADSPI_CR_FTHRES to 31 according to the datasheet but when I look at the registers I can see that only the 4 first bits are set. I've tried to manually flip the 5th bit with the debugger but it's as if the bit is write protected or something. Why can't I set the FTHRES value to 0x1F?

Below are pictures when I step with the debugger:

0693W00000LxLaCQAV.png0693W00000LxLaHQAV.png

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    1 reply

    Explorer
    June 21, 2024

    I just discovered this same issue on the STM32WB55. Are there any updates on resolving this issue?

    GBohlinAuthor
    Visitor II
    June 24, 2024

    I never got a fix for it and unfortunately I don't remember what workaround I did. It was quite a while ago.