STM32H747i-disco 10Mhz Uart Rx interrupt problem

[soulshine]

Hello ST experts, i need help about using STM32H747i-disco

I'm testing Uart Tx(DMA)-Rx(Interrupt). My goal is 10Mhz uart tx-rx.

The problem is that i success 750khz, but fail to Rx when baudrate 1Mhz~10Mhz.

 

I set the disco 480Mhz setting (hw SB setting done for SMPS -> LDO).

Uart8 peripheral clock is 120Mhz(Max). Uart8 Oversampling changed 16 -> 8 sample.

So i can set uart8 baudrate up to 15Mbps.

 

I connect STM32H747i-disco CN6-D0(PJ9 uart8-rx) to CN6-D1(PJ8 uart8-tx).

So if i run uart8_tx -> uart8_rx will catch.

I have testing uart gpio speed low to very high but it is not work for my case.

Success at 750khz. Fail at >1Mhz.

 

Need some advise.

Thank you.

 

[soulshine]

sorry. I wrote wrong expression.

750khz -> 750 kbps

1Mhz~10Mhz -> 1Mbps~10Mbps, 

[Pavel A.]

"Fail" and "not work" don't carry enough details to understand what fails.

Anyway, 10Mbps means ~ 1000 bytes/msec or ~ 1000 interrupts in millisecond, only from that UART. This does not look good.

 

 

[Guenael Cadier]

Hi @soulshine 

In default configuration of UART peripheral, there's no FIFO enabled. This means that reception of each character is requiring processing of 1 interrupt. Ability of processing this flow of interrupt wil determine the max baudrate you could achieve in this mode, before reaching the overrun error.

If not already done in your project, please try to enable the FIFO mode (STM32H7 should have a 16 byte long FIFO, so depending on your settings of Rx Fifo Threshold, this could help to decrease the number of interrupts).

Regards

 

 

[soulshine]

Hi Guenael Cadier

 

i'm using 120Mhz for Uart peripheral and I'm testing In the M4 core and there is only Uart channel 8 code for 5Mbps~10Mbps test.

Interrupt timing issue is not a problem under the 240Mhz core clock and 120Mhz uart peri clock.

Because, at 5Mbps Rx interrupt setting, interrupt will be generated every 2us, but the M4 core tick is 4ns and uart peri clock tick is 8ns. 

 

What i want to know is that if additional circuit is needed for high-speed uart communication in the STM32H747i-disco or not.

If additional hardware is required to be configured, I need to ask my colleagues to set up a circuit for testing.

We are conducting POC before making PROTO product with STM32H747i-disco

 

I will try FIFO mode but, I would really appreciate it if you could check if an extra circuit needs to be added or not.

[soulshine]

I have spent so many time for this and I solved it

 

first, when you use dual core, don't place the 2 core instructions in the same flash bank.

It will lower core performance. I want to know why is it happening.

 

Second. If you use uart faster then 3Mbps, you can't use Rx interrupt. DMA Rx is needed.

 

ST experts, can you tell me why the core performance lower problem is happening when the 2 core instructions is in the same bank?

 

[Pavel A.]

Do you enable ICACHE (instructions cache) on the CM7 core?

 

[soulshine]

i didn't change anything about CM7 caches.

i tested same code.

The only difference is place the M4 and M7 code to each bank or differ bank