stm32h747I-disco sdram cas

[GanZ]

 I'm using STM32H747i-DISCO board. In Stm32Cube_FW_H7_V1.11.2 STM32H747I-DISCO example project -- stm32h747i_discovery_sdram.c, cas is 3. SDRAM worked fine with this setting. It didn't work when I changed cas to 2. Datasheet of Is42s32800G-6BLI shows cas is 2 at 100MHz clock.

In How to set up the FMC peripheral to interface with the SDRAM...CAS is also set to 2 for FMC clock 100MHz.  Why cas need to be 3 in Stm32Cube_FW_H7_V1.11.2 STM32H747I-DISCO example project?

 

[Tesla DeLorean]

>>Why cas need to be 3 in Stm32Cube_FW_H7_V1.11.2 STM32H747I-DISCO example project?

Probably doesn't, but causes no harm, and provides more margin in the access timings, and perhaps others.

IS42S32800J-6BLI, perhaps check/confirm what's actually placed.   https://www.issi.com/WW/pdf/42-45S32800J.pdf

Are you running at 400 or 480 MHz?

[GanZ]

The SDRAM chip actually placed is IS42S32800g-6BLI.

I'm running at 400MHz. The clock to FMC peripheral is 200MHz, the clock feed to SDRAM is 100MHz.

[Billy OWEN]

Hi @GanZ 

 

This post has been escalated to the ST Online Support Team for additional assistance.  We'll contact you directly.

 

Regards,

Billy

[Tesla DeLorean]

@STTwo-32 can we please add action items to these tickets to come back and report findings so this stuff doesn't disappear down a black hole, or into the opaqueness of internal systems? Thanks

[GanZ]

CAS==2 works when running @100MHz FMC.  It's my mistake that I keep forgetting that I need to change both places since it uses two different macros.

- https://github.com/STMicroelectronics/stm32h747i-disco-bsp/blob/bb81c6532fcc301fc760a98f8a42acede46bea83/stm32h747i_discovery_sdram.c#L144
- https://github.com/STMicroelectronics/stm32h747i-disco-bsp/blob/bb81c6532fcc301fc760a98f8a42acede46bea83/stm32h747i_discovery_sdram.c#L212