STM32U5: 2 NMI generated upon 2-bit Flash ECC error.

[harisuvarna]

Hi ,

I am working on to implement functionality to detect flash 2 bit ECC error. To test my implementation followed below method in STM32U5 reference manual. With this method,  I am able to generate flash 2 bit ECC error.

However I have following observations

•  SYS_ECC  bit in FLASH_ECCR register sets upon NMI generation and never clears
•  2 NMI interrupts generated instead of 1. 

Is this is expected behavior. Please clarify.

Regards,

Hareesha

[Tesla DeLorean]

>>2 NMI interrupts generated

You leave the NMI Handler? Without clearing the source?

[harisuvarna]

Hi,

Thanks for the quick response. In my case source of the NMI is 2-bit Flash ECC error. Hence I cleared corresponding 

flag (ECCD) by writing to 1 bit ECCD in register FLASH_ECCR.

Regards,

Hareesha