STM32U5: ADF1 plus LPDMA plus SDMMC
I've been working on a custom STM32U595 board which uses ADF1 to read from a digital MEMS microphone and store audio samples in a SRAM4 buffer using the LPDMA. A circular buffer is implemented where LPDMA1 reads samples from ADF1 and generates interrupts when the buffer is half full and full. I then wanted to write the SRAM4 buffer to a SD Card through the SDMMC1 interface. Below is a simple block diagram of what I'm trying to accomplish:

I can get everything working really well when using the GPDMA1 and a ram buffer located elsewhere then SRAM4. But I'd like to reduce overall power by utilizing the LPDMA and stop mode 2 while collecting audio samples from the microphone. Then wake up and write the samples to the SD Card using SDMMC and the associated IDMA.
However, I was disappointed to discover that LPDMA only works with SRAM4, and the SDMMC peripheral only works with RAM other then SRAM4 (page 133 of user guide). This limitation seemingly makes writing data buffered in SRAM4 to a SD card impractical because the SDMMC DMA operation no longer works
Does anyone know if there is a way around this problem? Or is what I'm trying to do unrealistic given the limitations of the peripherals?
Any advice would be greatly appreciated
