STM32U5 Backup SRAM in standby

[ArnoutDekimo]

Hi,

I have a question regarding the backup SRAM in the STM32U5. The reference manual is not clear about this:

On the one had, it mentions the following

 

Which seems to indicate that it is possible to place the device in standby without powering SRAM2. 

HOWEVER, it also says this:

 

This last line (The backup SRAM content is lost in Standby mode without SRAM2 retention. If either RRSB1 or RRSB2 bit is set in Standby mode, the backup SRAM is also retained.) seems to say that it is NOT possible, and one ALWAYS has to retain the 8kB to retain at least the 2kB.

 

What's more, in the PWR_ModesSelection example, the example configurations only include the following 3 options:

 

Which also seem to indicate that it is not possible to only retain the 2kB

 

 

So which is it: Is it possible to retain the backup SRAM (2kB) WITHOUT retaining the full 8kB (or the other page) of the SRAM2 bank or not?

 

Thanks for your clarification!

Arnout

 

 

[ArnoutDekimo]

And note from the datasheet:

It really seems possible that only the BKSUPSRAM is enabled and not the 8kB or more in the SRAM2.

But, this would mean:

- The comment in the RM is confusing

- The PWR_ModesSelection example is confusing

 

Anyway, I'd like to hear from you what the actual supported options are.

 

Kind regards,

Arnout

[Aime]

Hi @ArnoutDekimo,

 

I will try to clarify the point. 

 

First you have to know that there is a difference between the BKPSRAM and the Backup registers.

The backup registers are present on most of our STM32 and contain mostly the configuration of the RTC (LSE, LSI, Tamper...) and they are always enabled in Standby mode.

The BKPSRAM is an additional memory which is not always present in all STM32 and in Standby can be kept:

 - If the bit BREN in the PWR_BDCR1 register is enabled.

 - Or if one of the bank of the SRAM2 is kept in Standby mode with the bits RRSB1 and RRSB2.

 

So to answer your question yes it is possible to retain only the BKPSRAM without the SRAM2 in Standby mode by using only the BREN bit or the HAL_PWREx_EnableBkupRAMRetention function.

 

=> Now regarding the comment in the RM:

 

The backup SRAM content is lost in Standby mode without SRAM2 retention. If either RRSB1 or RRSB2 bit is set in Standby mode, the backup SRAM is also retained. 
This sentence just means that there is no need to use this bit if one of the RRSB1 or RRSB2 bit is enabled, because by default the BKPSRAM will be retained.

As you can see we put this note only in the case where the BREN bit = 0 meaning that "If the bit BREN = 0, The backup SRAM content is lost in Standby mode without SRAM2 retention".

 

=> Now for the PWR_ModesSelection example:

 

The example uses only the 3 configurations: without any retention, with 8KB of SRAM2 retained and full SRAM2 retained, but it is up to the customer to customize the example provided. 

 

Please let me know if there is any confusion.

 

Best regards,

Aime

 

 

[Sergio76]

Hi @Aime,

I'm doing some tests on STM32U5 Nucleo-144 board and the behavior seems to be not aligned to the documentation and your answer.

The U5 correctly goes to sleep in stand-by mode but the backup SRAM keeps data also if BREN bit is not set. I've also tried to explicitly unset BREN bit and data are retained.

I've checked that both RRSB1 and RRSB2 are unset. (PWR CR1 is 0x00000084)

So it seems that Backup SRAM is always retained in stand-by mode.

I've also tried using Shutdown mode and the behavior is as expected, so if BREN is unset data are not retained and if BREN is set data are kept.

How can we explain this behavior?

Thanks and best regards.

Sergio

[ArnoutDekimo]

Thank you aime, that's very clear now

 

 

[saikumar]

Hello Sir ,

Did you used USB video class or CDC for your STM32U5 mcu. if you used any of them , i am kindly requesting you to send your reference code or usb files for my reference as i am stuck while generating code for video class and initialization is not working well.

 

 Thank you ,