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May 23, 2024
Question

STM32U575 ADC1 AWD1 Interrupt handler abnormal

  • May 23, 2024
  • 0 replies
  • 622 views

 

        The awd1 interrupt is enabled. The flags of awd1 and EOS are set before entering the ADC1_IRQHandler. If the flag of awd1 is handled first in the ADC1_IRQHandler, the flag of EOS will not be handled. If the flag of EOS is handled first in the ADC1_IRQHandler, the flag of awd1 will not be handled. It seems that when I clear one flag first, the others disappear.

 

void ADC1_IRQHandler(void)
{
	if((ADC1->ISR & ADC_ISR_AWD1_BIT) != 0)
	{
		ADC1->ISR |= ADC_ISR_AWD1_BIT;
		ADC1->LTR1 = 0x00000000u;
		ADC1->HTR1 = 0x00003FFFu;
	}
	if((ADC1->ISR & ADC_ISR_EOS_BIT) != 0) // Always be false
	{
		/* Clear flag ADC group regular end of sequence conversions. */
		ADC1->ISR |= ADC_ISR_EOS_BIT;
	}
}

 

 

 

void ADC1_IRQHandler(void)
{
	if((ADC1->ISR & ADC_ISR_EOS_BIT) != 0)
	{
		/* Clear flag ADC group regular end of sequence conversions. */
		ADC1->ISR |= ADC_ISR_EOS_BIT;
	}

	if((ADC1->ISR & ADC_ISR_AWD1_BIT) != 0) // Always be false
	{
		ADC1->ISR |= ADC_ISR_AWD1_BIT;
		ADC1->LTR1 = 0x00000000u;
		ADC1->HTR1 = 0x00003FFFu;
	}
}

 

 

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