STM32U5A5 GPIO state change on Stop2 mode enter

[ocean_rse]

I am trying to figure out why the state of GPIO pins are changing after entering Stop2 mode. I've got an ADC chip connected with Reset lines being held high by GPIO pins configured as push-pull with pull-ups enabled. When the device enters Stop2 mode, these GPIO lines drop. I catch the error right after the device exits Stop2 mode and I can see in the registers that the configuration of the GPIO pin is correct, but the bit to set the pin high in GPIO_ODR register has cleared.

The reference manual (section 10.7.8) states the I/O pins should retain their RUN mode state in Stop2 mode. Help me understand. Am I missing something here?

[STOne-32]

Dear @ocean_rse ,

Can you detail more the case : is this change observed during STOP2 or after exit from STOP2 and back to RUN Mode ? If possible to have the sequence of entry /exit in STOP2 and if the behavior easy to reproduce on a standalone MCU ?. 
Have a great day,

STOne-32