The CKMODE bit becomes 0 after changing the setting values of the OVSE bit or OVSR bit in ADC_CFGR2 register.

[Sleep]

The CKMODE bit becomes 0 after changing the setting values of the OVSE bit and OVSR bit of ADC_CFGR2.

Therefore, the clock frequency of ADC exceeds Max32MHz.

Is it a malfunction of STM32G071?

I am very in trouble.

If you have any countermeasures, please let us know.

[TDK]

Changing OVSE/OVSR should not affect CKMODE. Post your code. Ensure you're adhering to the requirements for changing these bits. For CKMODE, periphal must be disabled.

[waclawek.jan]

Hi @Sleep ,

I know this is an old thread, but I wonder, how did you cope with this problem?

Thanks,

JW