timer 3 channel 2 pwm influence channel 4
Using stm32h743 device. when configuring timer 3 as pwm on channel 1 with phase on channel 2, we see that channel 4 will be influenced by channel 2
even though channel 4 was not defined.
if i configured channel 3 and 4 for pwm and phase i will have the same problem.
- if start only pwm on channel 3 and 4 (phase) and stop it will function well.
- if start only pwm on channel 1 and 1 (phase), then start channel 3 and 4
then stop channel 1 and channel 2 while channel 3 and 4 that generate pwm and then stop
on channel 1 and 2, channel 4 will also stop.
I have configured other timers for pwm non of them had this problem.
if I clear timer 3 register using the code below before configuring timer 3 i will steel have the problem
__HAL_RCC_TIM3_CLK_ENABLE();
TIM3->CR1 = 0;
TIM3->CR2 = 0;
TIM3->SMCR = 0;
TIM3->DIER = 0;
TIM3->CCMR1 = 0;
TIM3->CCMR2 = 0;
TIM3->CCER = 0;
TIM3->BDTR = 0;
TIM3->EGR = TIM_EGR_UG; // Force update to reset counters and preload registers
TIM3->CCER &= ~TIM_CCER_CC4E;
