Timing of Hardware Semaphore

[cbcooper]

We're using a STM32H747IGT6 and using hardware semaphores to coordinate between the two cores.

On the CM4 I've set up TIMER3 to run at full blast:

 

 LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM3);
 LL_TIM_SetPrescaler(TIM3, 0); // Count at system clock
 LL_TIM_SetAutoReload(TIM3, 0xFFFF);
 LL_TIM_EnableARRPreload(TIM3);
 LL_TIM_SetCounterMode(TIM3, LL_TIM_COUNTERMODE_UP);
 LL_TIM_SetClockDivision(TIM3, LL_TIM_CLOCKDIVISION_DIV1);
 LL_TIM_EnableCounter(TIM3);

 

I believe that means the timer is running at 240 MHz (do you agree?) which is one tick every 4.166 nsec.

So now I grab and release a hardware semaphore that is not used anywhere else in the code:

 

 start_timer = LL_TIM_GetCounter(TIM3);
 WRITE_REG(HSEM->R[TEST_SEMAPHORE_NUMBER], (HSEM_R_LOCK | LL_HSEM_COREID | SHMEM_CM4_PID));
 uint32_t readBack = HSEM->R[TEST_SEMAPHORE_NUMBER];
 if (readBack == (HSEM_R_LOCK | LL_HSEM_COREID | SHMEM_CM4_PID))
 WRITE_REG(HSEM->R[TEST_SEMAPHORE_NUMBER], (LL_HSEM_COREID | SHMEM_CM4_PID));
 end_timer = LL_TIM_GetCounter(TIM3);
 delta_timer = end_timer - start_timer;

 

and inspect the value of 'delta_timer'.  What I see is that it often takes 84 ticks (350 ns) but on occasion takes as many as 232 (967 ns).

Why does it sometimes take 3x longer, since no other process in the system is using that hardware semaphore?   Can the HSEM only think about one semaphore at a time, and some other semaphore is being processed?

[TDK]

Wrap it in __enable_irq/__disable_irq to ensure no interrupts fire in the middle.

[cbcooper]

Woah ... ok, this is a good news / bad news situation.

Good news: you were 100% correct, other interrupts were firing in the middle.  If I wrap that code in __enable_irq/__disable_irq it drops from 350 - 967 nsec to a consistent 75 nsec.  Nice!

Bad news: I added some code in increment counters in all 4 of my IRQ handlers, trying to figure out which one is eating up all my CPU time, and not one of them is firing (which is what I expected).  That means there are IRQs firing in the CM4 that I don't know anything about, and apparently firing an insane amount.

I've inherited this code so don't know it completely, but it's relatively straightforward and the hardware configuration code is pretty clear.

Is there a clever way to figure out what interrupt(s) are firing on the CM4?

[TDK]

Look at VECTPENDING in SCB->ICSR just prior to re-enabling the interrupt.