Trying to understand the cycle count on my STM32G431 code
Hi,
I have some code running on an STM32G431 that does a loop in which it reads on a pin on port GPIOB, shifts the value and writes the result on GPIOC.
I have trouble really understanding the timing I see on the oscilloscope.
The code is:
ldr r1, =0x48000410
ldr r2, =0x48000814
1:
ldr r3, [r1]
lsl r4, r3, #3
str r4, [r2]
b 1b
the delay between the signal going changing on B1 and the signal changing on C4 is between 40 and 80ns depending on when the change occurs during the loop. If I made no mistake, both the SYSCLK and HCLK run at 170MHz:
let mut d: embassy_stm32::Config = Default::default();
d.rcc.hsi = false;
d.rcc.hse = Some(Hse { freq: Hertz::mhz(8), mode: HseMode::Oscillator });
d.rcc.pll = Some(
Pll {
source: PllSource::HSE, // 8MHz
prediv: PllPreDiv::DIV2, // 4MHz (min: 2.065MHz, max: 16MHz)
mul: PllMul::MUL85, // 340MHz (max allowed: 344MHz)
divp: None,
divq: None,
divr: Some(PllRDiv::DIV2), // 170MHz (max allowed: 170MHz)
}
);
d.rcc.sys = Sysclk::PLL1_R;
d.rcc.boost = true;
The HAL I use has default of DIV1 for the AHB and APB prescalers:
ahb_pre: AHBPrescaler::DIV1,
apb1_pre: APBPrescaler::DIV1,
apb2_pre: APBPrescaler::DIV1,
My code seems to be running in about (40/5.88=) 7 cycles, but I don't exactly know which instructions takes more than one cycle.
I know I can add a nop after the GPIO read and that make no different on the execution time. Code runs from flash and cache is activated.
The STM32G4 series reference manual don't says there are wait states for the register, but it also says in the GPIOs main features: "Fast toggle capable of changing every two clock cycles". I could not find why it can't be done every cycle.
Is there any simple answer to this question? Is there a good documentation to get in depth knowledge of cycle counting the stm32(g4) ?
Thank you,
